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Article by DailyStocks_admin    (02-13-09 05:15 AM)

The Daily Magic Formula Stock for 09/13/2009 is Verigy Ltd. According to the Magic Formula Investing Web Site, the ebit yield is 23% and the EBIT ROIC is >100%.

Dailystocks.com only deals with facts, not biased journalism. What is a better way than to go to the SEC Filings? It's not exciting reading, but it makes you money. We cut and paste the important information from SEC filings for you to get started on your research on a specific company.


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BUSINESS OVERVIEW

Overview

Prior to our initial public offering, we were a wholly-owned subsidiary of Agilent Technologies, Inc. ("Agilent"). We became an independent company on June 1, 2006, when we separated from Agilent. On June 13, 2006, we completed our initial public offering and became a separate stand-alone publicly-traded company incorporated in Singapore focused on technology and innovation in semiconductor testing. We design, develop, manufacture and sell advanced test systems and solutions for the semiconductor industry.

We offer a single platform for each of the two general categories of devices being tested: our V93000 Series platform, designed to test System-on-a-Chip ("SOC"), System-in-a-Package ("SIP") and high-speed memory devices and our V5000 Series platform, designed to test memory devices, including flash memory and multi-chip packages. In the first quarter of fiscal year 2009, we introduced our V6000 Series platform which is the successor to the V5000 platform and was designed to test both flash memory and dynamic random access memory ("DRAM") devices. Our test platforms are scalable across different frequency ranges, different pin counts and different numbers of devices under simultaneous test. The test platforms' flexibility also allows for a single test system to test a wide range of semiconductor device applications. Our single platform strategy allows us to maximize operational efficiencies such as relatively lower research and development costs, engineering headcount, support requirements and inventory risk. This platform strategy also provides economic benefits to our customers by allowing them to move their complex, feature-rich semiconductor devices to market quickly and to reduce their overall costs. In addition to our test platforms, our product portfolio includes advanced analysis tools as well as consulting, service and support offerings such as start-up assistance, application services and system calibration and repair.

As of October 31, 2008, we have installed more than 1,900 V93000 Series systems and nearly 2,600 V5000 Series systems worldwide. We have a broad customer base which includes integrated device manufacturers ("IDMs"), test subcontractors, also referred to as subcontractors or "OSATs"

(outsourced sub-assembly and test providers), which includes specialty assembly, package and test companies as well as wafer foundries, and companies that design, but contract with others for the manufacture of, integrated circuits ("ICs") (known as fabless design companies).

The Semiconductor Test Equipment Industry

Industry Background. Semiconductor devices, also referred to as integrated circuits, or ICs, are the fundamental building blocks used in all electronic systems. They have played an important role in enabling the proliferation of computing, communications and consumer electronic products. As technology continues to penetrate most aspects of daily life, semiconductor devices are playing a more important role in a growing number and variety of products; these products are increasingly consumer-oriented. Consequently, the global semiconductor industry, while experiencing significant cyclical fluctuations in its growth rate, has exhibited strong overall growth over the last 30 years.

The design and manufacture of semiconductor devices is a complex and capital-intensive multi-step process. The process involves different types of equipment used to manufacture, assemble and test semiconductor devices. Semiconductor test equipment and services are a critical part of this complex design and manufacturing process and are utilized in each of the key design and manufacturing stages.

Demand for new semiconductor test equipment is driven by two primary forces: growth in semiconductor unit volume that drives the need for additional testing capacity, and the adoption of new technologies in semiconductor design, manufacturing and packaging that require new types of semiconductor testing equipment.

Semiconductor test equipment and services are generally categorized by the type of semiconductor device tested. There are two general markets in which we sell our products—memory and non-memory. The memory market includes equipment to test semiconductors such as DRAM, Flash, NAND and NOR, and the non-memory market includes testers for testing less complex, discrete semiconductors, and testers designed to test very complex, highly integrated semiconductors commonly referred to as System-on-a-Chip, or SOC, or System-in-a-Package, or SIP, testing.

SOCs and SIPs are semiconductors that integrate the functionality of multiple individual ICs onto a single IC or package, and often contain both digital and analog functionalities, including radio frequency ("RF") capabilities, communication interfaces and embedded memory. By combining multiple technologies onto a single, more complex chip or package, these devices provide the benefits of lower cost, smaller size, higher performance and lower power consumption and facilitate faster time-to-market that is critical, particularly for products targeted to the consumer electronics market.

Flash and DRAM represent the bulk of the memory device market (in terms of bit and unit shipments as well as revenue). Flash memory has become the dominant non-volatile memory technology wherever a significant amount of solid-state storage is required. The most meaningful characteristic of flash memory—and its key differentiator from DRAM—is the fact that it requires no power to maintain the information stored in the cells of the memory device. The market for flash memory, as measured by megabits shipped, has doubled every year since 2002. This growth has been fueled largely by the extensive use of flash memory in consumer products such as MP3 players, cell phones, digital cameras and other handheld devices. An emerging trend is replacing hard disk drives with solid state disk drives; this trend is being enabled by the declining cost of flash memory combined with the better reliability of solid state memory products compared to those with moving parts.

DRAM is the prevalent memory in personal computers, workstations, and non-handheld gaming consoles (such as Playstation and Xbox); it is distinguished from flash in its structural simplicity and in the fact that it loses the data stored in its cells when power is removed. The market for DRAM devices is characterized by extreme volatility with multi-year periods (typically three to four years) of

substantial market growth (measured in aggregate revenues of DRAM manufacturers) followed by one or two years of decline.

Given the compact nature of consumer electronics products and the increasing need for more memory and different types of memory (both volatile and non-volatile) in these products, complex and more compact memory device packaging techniques, such as stacked and multi-chip packages, or MCPs, are being adopted. Semiconductor test equipment plays an important role by enabling semiconductor designers and manufacturers to lower their overall costs and get products to market quickly in addition to improving the quality and reliability of their end products. By detecting manufacturing and engineering/design defects, test equipment enables semiconductor designers and manufacturers to improve and speed the time to manufacturing yield, meaning the proportion of semiconductor devices that perform to specifications. In addition, we believe that scalable and flexible test equipment represents a key competitive advantage because it reduces test time, assists in achieving faster time to market and lowers capital investment requirements by allowing semiconductor designers and manufacturers to test different types of semiconductors with the same test equipment. It also supports the overall and on-going cost of test on a manufacturing test floor by supporting the ability to upgrade existing equipment to meet the test requirements of new technologies. Upgrades will traditionally be far more cost effective than the purchase of new equipment. Finally, scalable and flexible test equipment has the advantage of reducing manufacturers operating expenses associated with the training of personnel and maintaining spares or service contracts across multiple disparate platforms.

Bringing semiconductor products to market is a multi-step process, which includes stages referred to as engineering characterization, production ramp and high-volume production. Semiconductor test equipment plays an important role in each of these stages.

Engineering Validation and Characterization. Once an initial design of a semiconductor has been created, the first phase in bringing an actual IC to market is to produce a small quantity of prototype ICs to validate the design and ensure that it performs according to its specifications, and establish what the actual specifications might be. What the semiconductor designer needs most from the test equipment and services provider at this phase is advanced and highly flexible test equipment and test strategy expertise. Test strategies and methodologies are developed early to ensure that the test solution implemented is capable of testing the ICs thoroughly and in a manner that is indicative of the devices' likely end-use model. Enabling the test equipment to quickly identify the physical location where a device is failing helps to shorten the loop between design and the fabrication.

Production Ramp. Once the engineering validation and characterization phase has been completed, the next phase is the ramp to production. In this phase, the semiconductor designer is focused on transitioning the device to the high-volume production stage as quickly as possible so that profit can be realized. In order to do this, the semiconductor designer and manufacturer rely on the test equipment and services provider to offer test execution expertise and an understanding of the manufacturing process. Test solutions at this phase are no longer focused on validating the product design, but are focused on fine-tuning the applications test program to optimize yield and minimize cost.

High Volume Production. The final phase in bringing a semiconductor device to market is high-volume production. The key focus for the semiconductor manufacturer at this phase is to reduce the overall cost of test by achieving high output of quality semiconductor devices. To achieve this goal, semiconductor manufacturers require high-reliability and high-repeatability test equipment with maximum availability, and tailored service and support, from their semiconductor test equipment and services provider. Integration of the test solution into the production process is optimized to improve efficiency and minimize the time that test equipment is not available. In order to achieve high throughput, test equipment that is not only fast but can test multiple devices simultaneously is critical. Parallel testing is especially important, and well established, for memory devices but is of increasing importance in SOC testing for consumer devices.

Semiconductor Test Market Challenges

Because of the competitiveness of the broader consumer electronics market, semiconductor designers and manufacturers are increasingly focused on bringing high quality complex ICs to market faster and at lower costs. As a result, semiconductor test equipment and service providers are facing new challenges confronted by semiconductor designers and manufacturers due to:

Increased pressure to reduce overall cost of test

Continued cost pressures are driving semiconductor designers and manufacturers to demand higher utilization of test systems, as well as test systems that can be re-used across different types and generations of ICs. Test systems are required to demonstrate the scalability and flexibility necessary to permit desired levels of utilization and extend their useful life. Rapid technology change within the semiconductor industry can quickly render non-scalable test equipment obsolete for the testing of new generations of semiconductors.

Increased pressure to improve time-to-market

Today's semiconductor market is characterized by shortening product life cycles as a result of increased exposure to and reliance on the consumer electronics market. Semiconductor designers and manufacturers that are first to market and that quickly adapt to changing technological advances gain a significant competitive advantage. The complex nature of semiconductor manufacturing requires that test solutions providers offer their customers more than just test equipment. Semiconductor designers and manufacturers require tailored test solutions and a breadth of application expertise in order to accelerate their time-to-market with new ICs and maximize their revenue opportunity. Equipment suppliers that are not able to complement their hardware systems with application expertise have limited ability to impact their customers' time to market.

Increased complexity and performance requirements of test

The trend towards SOCs, SIPs and MCPs has created new challenges for semiconductor designers and manufacturers. These increasingly complex semiconductor implementations, which enable improved performance and optimized form and function, require sophisticated test solutions. In addition, advances in interface technology, the adoption of new design protocols and process technology innovations have only added to this complexity. Test equipment designed as "point solutions" rather than those designed for scalability and flexibility are frequently more costly in the long run.

Meeting the needs of test subcontractors

Test subcontractors face specific test challenges. Subcontractors provide test services to a diverse group of semiconductor designers and manufacturers, which include both fabless design companies and integrated device manufacturers, referred to as IDMs. As a result, subcontractors are continually challenged to provide the capabilities to test a wide range of ICs. Optimizing the utilization of a subcontractor's installed capital equipment is therefore important to its success. In order to optimize this utilization, subcontractors require flexible semiconductor test systems that are capable of testing a broad spectrum of ICs. Additionally, subcontractors require systems that can test ICs with varying pin counts while maintaining cost efficiencies and high throughput levels. For this reason, test solutions providers who fail to offer scalable and flexible architectures, as well as a breadth of application expertise, may fall short in meeting the needs of subcontractors.

Our Solution

We design, develop, manufacture, sell and support advanced test solutions for the semiconductor industry. Unlike competitors who provide multiple platforms for testing SOC devices, we provide a single scalable platform for testing each of the two general categories of devices, memory and SOC/SIP. As part of our single scalable platform strategy, we develop and offer performance and capability enhancements to our platforms as part of our product development roadmap. Our V93000 Series platform is designed to test SOC, SIP high-speed memory devices, and our V5000 Series platform and recently introduced successor V6000 Series platform are designed to test memory devices, including flash, DRAM and MCPs. We provide a range of services to assist our customers in achieving the necessary time-to-volume manufacturing, required of the competitive end-use markets. We also deliver software that is targeted at the time-to-market and time-to-volume ramps of our customers.

More than a decade ago, we introduced the concept of a scalable platform architecture for semiconductor testing, and we continue to capitalize on the benefits of that strategy today. Our scalable platform architecture provides us with internal operating model efficiencies, such as reduced research and development costs, simplified support requirements and reduced inventory risk. The scalability and flexibility of our solution also provide economic benefits to our customers by allowing them to get their complex, feature-rich semiconductor devices to market quickly and to reduce overall costs. We believe our advanced SOC/SIP/high-speed memory and memory test solutions provide optimal combinations of flexibility, cost and performance to a wide range of designers and manufacturers in the semiconductor industry at all stages of bringing a semiconductor product to market, from design to engineering characterization to high-volume manufacturing. The key elements of our solutions are:

Scalable platform across a broad range of performance levels

Reducing the overall cost of test is critical for our customers. Our test platforms are scalable in a number of ways, including the frequency range of the applied test signals, the number of pins to accommodate ICs with different pin counts and the number of devices that can be tested in parallel. This scalability allows semiconductor manufacturers considerable flexibility in selecting the right test solution to meet their needs, at an optimized level of capital investment. In addition, our test systems can be quickly reconfigured or upgraded as requirements change. The combination of scalability, speed and ease of reconfiguration of our test systems enables our customers to reduce their long-term capital equipment requirements and minimize manufacturing downtime.

The scalability of our test platforms is enabled by a "tester-per-pin" architecture, in the case of our SOC/SIP/high-speed memory test platform, and a "tester-per-site" architecture, in the case of our main memory test platform. Our "tester-per-pin" architecture utilizes a separate and independent test processor for each pin, enabling each pin to be tested independently and in parallel to the testing of other pins. Our "tester-per-site" architecture is tailored to make use of the parallel structure of memory devices to test a large number of devices in parallel because it utilizes a separate and independent test processor for each physical interface of the test system to a device under test. We refer to those interfaces as test sites. With our optional Programmable Interface Matrix and Active Matrix Module, our V5500 and V6000 Systems for the final test of packaged devices can further capitalize on the parallel structure of memory devices to test multiple devices per test site, thereby increasing its parallel testing capabilities. For our SOC/SIP/high-speed memory test systems, the process of frequency performance scaling is often done "instantly" through a software upload as the device test program is loaded into the system. For all of our test systems, the process of scaling up the number of devices a test system is capable of testing in parallel is often accomplished quickly, typically requiring only a few hours for basic scaling and only a few days for more extensive scaling. The per-pin architecture of our SOC/SIP/high-speed memory test systems also enables us to offer customers innovative licensing models. For example, we currently offer our customers the unique ability to purchase and share performance licenses across a test floor or even an enterprise; the result is optimized return on invested capital. As a result, our customers are able to buy only the performance they need for each pin of the system.

Flexible platforms across a breadth of applications

Our test platforms are also highly flexible in that they allow a single test system to test a wide range of applications for semiconductor devices. The high level of software reconfigurability of our test platforms, and the support and enhancements we offer, enable our customers to implement a broad range of application tests tailored to their needs, including tests for high-speed digital, analog/mixed signal, flash memory, RF, DRAM and high-speed memory devices. In addition to enabling our customers to test a broad range of products, our test systems also support, through software reconfiguration, a number of advanced test methodologies, such as built-in self test ("BIST"), design-for-testability ("DfT"), reduced pin count ("RPC") test, and concurrent test. These methodologies can simplify testing complex devices, thereby increasing our customers' throughput as well as improving their time to market. We are continually developing additional enhancements to our test platforms to support additional application tests and test methodologies.

Competing test platforms often require an IC device manufacturer to have devices tested by multiple test systems in order to complete the tests required for different applications contained in the devices. This process is not only expensive, cumbersome and time-consuming, but it also takes up valuable floor space in the manufacturing facility. In comparison, our test platforms are able to run the tests for a significant number of different applications without having to move devices to different test systems. The flexible test capabilities of our V93000 Series and V5000/V6000 Series test platforms enable our customers to reduce their overall cost of equipment acquisition, employee training and test equipment maintenance while simultaneously increasing equipment utilization.

Advanced, innovative test technology

As a result of the competitive pressures our customers face, they continually need to develop and bring to market increasingly complex products. We develop advanced technology solutions in order to assist our customers in accomplishing this goal in a cost effective and timely manner. From our history as part of Agilent, which was part of Hewlett Packard ("HP") until its spin-off in 1999, we have a legacy of introducing new and innovative designs to market. Some of these key innovations include the development of scalable platforms for both SOC/SIP/high-speed memory and memory test through our "tester-per-pin" and "tester-per-site" architectures, our test processors utilizing high performance application-specific integrated circuits, or "ASICs," and our liquid cooling technology for our test system hardware.

Since 1991, we have used ASICs for our test processors in place of larger, less integrated and less sophisticated designs, allowing our test processors to be very small and providing our test systems with the high performance and accuracy expected from an ASIC-based design. The small size of our ASIC-based test processors enables our "tester-per-pin" and "tester-per-site" architectures. Along with the additional performance, scalability and flexibility benefits of those architectures, our ASIC-based architectures result in test systems that are able to test large numbers of devices in parallel in a small test platform footprint. The extensive use of ASICs and the degree of integration of our systems makes them more energy efficient than competitive systems we well. We complete the initial design phase and functional design of the ASIC, but we partner with other companies such as Avago Technologies, Cadence, Analog Devices, Maxim Integrated Products and TSMC to complete the physical design, and fabrication of the ASIC. We have over 15 years of experience in designing ASICS and own the intellectual property rights for the initial and functional designs that are integrated into this technology.

Our products use liquid cooling technology, which provides lower operating temperatures, greater system reliability and repeatability, reduced operating costs, improved accuracy and speed and quieter and cooler operation than the traditional air cooled technology used in some competitive products. The liquid cooling supports the increased integration and enables us to achieve a small test platform footprint. We released our first liquid cooled tester in 1991 and have extensive experience in the application of liquid cooling technology to semiconductor test systems.

During fiscal year 2008, we completed the acquisition of Inovys Corporation. This acquisition added to the Verigy portfolio of test solutions a software suite aimed at optimizing customers engineering and high volume manufacturing environment, especially at the more challenging process nodes from 65nm and below. We are in the process of integrating this suite of software tools into the V93000; once that integration is complete, Verigy will be unique in the semiconductor test industry at offering solutions for silicon debug and tester-based yield learning for devices that make extensive use of scan-based design, which is becoming prevalent in logic circuits at the lower geometries. This software suite will provide value not only in the test operations of our customers but also in their design and process/yield operations.

Global delivery of expert application knowledge

Getting semiconductors to market quickly is vital for our customers. Our worldwide professional staff of highly trained applications engineers provides our customers with a high level of technical expertise to assist our customers as they develop test applications for their semiconductor devices. Our extensive expertise spans a broad range of semiconductor devices, including chipsets and graphics, wireless and wired communication, flash and DRAM memory, video and audio, high-speed and specialty memory and complex multi-chip memory packages. We also produce leading-edge innovative test technologies and deliver, on a global basis, superior expertise across a wide range of applications to assist our customers in quickly delivering new feature-rich products to the market.

Lowered overall cost of test for customers

We have designed our platforms to be versatile and reconfigurable. As a result, our customers are able to select a configuration to meet their current test requirements and, as those requirements change, to upgrade the capabilities of their test equipment to meet their future needs without having to purchase completely new systems. Our high quality and reliable test solutions provide high uptime as measured by the reliability of the test equipment. Additionally, our ability to provide innovative solutions and technical expertise across a wide variety of applications helps our customers optimize test equipment performance for the specific semiconductor device being tested, which reduces test times and increases both yield and cost efficiencies. Consequently, we believe our solutions lower our customers' cost of test in high volume manufacturing.

Shortened time-to-market

To achieve fast time to market, our customers require scalable and flexible test platforms and application expertise and support at each stage of the manufacturing process. We provide scalable and flexible test platforms based on our established architectures, which can be changed and reconfigured quickly to address new test technologies. Our highly trained applications engineers provide support for the development of test strategies, test applications analysis and optimization and test equipment utilization for our customers.

Our Strategy

Our objective is to be the leading semiconductor test solutions and services supplier, providing the highest return on our customers' investment in test operations. We continue to focus on our customers' evolving needs by offering innovative and versatile semiconductor test solutions that address the challenges facing semiconductor designers and manufacturers, and we remain committed to providing outstanding service and support to our customers. We intend to maintain efficiency in our business and capitalize on our research and development resources in an effort to sustain profitable growth in excess of the broader semiconductor test industry. We are executing on our flexible operating model and cost structure to enable us to increase and decrease our capabilities and spending in response to cycles in the semiconductor industry, and thereby deliver continued customer responsiveness as well as improved overall profitability. Key elements of our strategy include:

Maintaining the rapid pace of product innovation on scalable platforms

We believe scalable platforms offer our customers the best return on their investment in test equipment. The scalable architecture of our solutions coupled with the proven stability of our platforms facilitates our focus on innovative enhancements, application improvements and technical solutions in step with our customers' needs. The pace of innovation in the semiconductor industry is so rapid that performance doubles roughly every 18 months—a phenomenon referred to as "Moore's Law". Semiconductor companies thus require substantial technical expertise and constant innovation to successfully compete. We believe that with our scalable product architecture, wide-ranging technical capabilities and expertise and established global delivery platform, we are well positioned to be an innovator in the semiconductor test market and to assist our customers in competing successfully in the semiconductor market.

Continuing to focus on emerging opportunities for profitable growth

We will continue to seek increased market penetration by focusing on market opportunities where we can capitalize on our technical expertise and add value to our customers who demand the most advanced and cost-effective test solutions. We believe that these opportunities have attractive characteristics, such as the potential for increased customer adoption of our solutions and the potential for higher returns on our investment. Recent examples of such emerging opportunities include single-chip cell phone devices that feature radio frequency circuits integrated into CMOS die and other portable consumer electronics that utilize high-speed memory and complex SOCs, SIPs and MCPs.

Capitalizing on our success with test subcontractors to increase our success with IDMs

The scalability and flexibility of our platform architecture has led to our success in attracting subcontractors to our test solutions. We believe that the same advantages of our solutions that subcontractors find compelling will continue to drive the increased adoption of our solutions by customers that both design and manufacture ICs which are known as integrated device manufacturers or "IDMs." Today, all of the top ten IDMs utilize Verigy platforms for either engineering or production applications, or both. IDMs are facing increasingly intense competition, time-to-market pressures and shorter product lifecycles associated with consumer driven demand, which has led them to begin to outsource an increasing percentage of their semiconductor test business. We believe that our success with our subcontractor customers will drive IDMs to direct a greater percentage of their test business to us, as IDMs have an interest in maintaining consistency across their internal and external test platforms. These factors, combined with the cost and capital expenditures restrictions that many IDMs experience, are increasing the need for better asset utilization by IDMs.

Continuing to deliver an outstanding total customer experience throughout the product life cycle

Application support through all phases of the product life cycle is critical to our customers' ability to achieve fast time-to-market for their products while achieving a high return on their test solution investments. We provide our customers with extensive application expertise, and strive to maintain the global delivery capabilities of our customer-facing teams and to efficiently service our customers with an emphasis on responsiveness. We intend to expand our presence in Asia in the areas of applications engineering, research and development and order fulfillment in order to maintain favorable proximity to and further strengthen our relationships with customers in Asia. We will invest to train our applications engineering force on the necessary process-related language and know how to make the Inovys software suite successful in the customers' use models. Additionally, we will continue to accentuate and reward the values of professionalism, technical expertise and uncompromising integrity in all our employees in an effort to continually enhance our customers' experience.


CEO BACKGROUND

Overview

Basis of Presentation

The accompanying financial data has been prepared by us pursuant to the rules and regulations of the U.S. Securities and Exchange Commission ("SEC"). For a full understanding of our financial position and results of operations, this discussion should be read in conjunction with the combined and consolidated financial statements and related notes presented in this report on Form 10-K.

Our fiscal year end is October 31, and our fiscal quarters end on January 31, April 30, and July 31. Unless otherwise stated, all dates refer to our fiscal years and fiscal periods.

Amounts included in the accompanying combined and consolidated financial statements are expressed in U.S. dollars. The accompanying combined and consolidated financial statements have been prepared pursuant to the rules and regulations of the Securities and Exchange Commission ("SEC"). Certain amounts in the combined and consolidated financial statements for fiscal years 2006 and 2007 were reclassified to conform to the presentation used for fiscal year 2008.

In the third quarter of fiscal year 2008, we recorded a $2.6 million adjustment in interest income and other, related to foreign currency remeasurement gains. These gains relate to a failure to remeasure certain foreign currency assets and liabilities, primarily value added tax receivables, arising in fiscal years 2006, 2007 and the first two quarters of fiscal year 2008. Approximately $0.9 million relates to the unrecorded amounts arising from fiscal years 2006 and 2007. Management has assessed the impact of this adjustment and does not believe the amounts are material, either individually or in the aggregate, to any of the prior years' financial statements, and the impact of correcting these errors in the current year was not material to the full fiscal year 2008 financial statements.

Certain information and footnote disclosures normally included in financial statements prepared in accordance with generally accepted accounting principles ("GAAP") in the United States have been combined and or omitted pursuant to such rules and regulations.

Prior to June 1, 2006, we operated as part of Agilent, and not as a stand-alone company. Therefore, the accompanying combined and consolidated financial statements, prior to June 1, 2006, were derived from the accounting records of Agilent using the historical basis of assets and liabilities of Verigy. The expense and cost allocations, prior to June 1, 2006, have been determined on a basis we consider to be a reasonable reflection of the utilization of services provided by Agilent or the benefit received by us from Agilent.

Business Summary

Prior to our initial public offering, we were a wholly-owned subsidiary of Agilent Technologies, Inc. ("Agilent"). We became an independent company on June 1, 2006, when we separated from Agilent. On June 13, 2006, we completed our initial public offering and became a separate stand-alone publicly-traded company focused on technology and innovation in semiconductor testing. We design, develop, manufacture and sell advanced test systems and solutions for the semiconductor industry.

We offer a single platform for each of the two general categories of devices being tested: our V93000 Series platform, designed to test System-on-a-Chip ("SOC"), System-in-a-Package ("SIP") and high-speed memory devices and our V5000 Series platform, designed to test memory devices, including flash memory and multi-chip packages. In the first quarter of fiscal year 2009, we introduced our V6000 Series platform which is the successor to the V5000 platform and was designed to test both flash memory and dynamic random access memory ("DRAM") devices. Our test platforms are scalable across different frequency ranges, different pin counts and different numbers of devices under simultaneous test. The test platforms' flexibility also allows for a single test system to test a wide range



MANAGEMENT DISCUSSION FROM LATEST 10K

Basis of Presentation

The accompanying financial data has been prepared by us pursuant to the rules and regulations of the U.S. Securities and Exchange Commission ("SEC"). For a full understanding of our financial position and results of operations, this discussion should be read in conjunction with the combined and consolidated financial statements and related notes presented in this report on Form 10-K.

Our fiscal year end is October 31, and our fiscal quarters end on January 31, April 30, and July 31. Unless otherwise stated, all dates refer to our fiscal years and fiscal periods.

Amounts included in the accompanying combined and consolidated financial statements are expressed in U.S. dollars. The accompanying combined and consolidated financial statements have been prepared pursuant to the rules and regulations of the Securities and Exchange Commission ("SEC"). Certain amounts in the combined and consolidated financial statements for fiscal years 2006 and 2007 were reclassified to conform to the presentation used for fiscal year 2008.

In the third quarter of fiscal year 2008, we recorded a $2.6 million adjustment in interest income and other, related to foreign currency remeasurement gains. These gains relate to a failure to remeasure certain foreign currency assets and liabilities, primarily value added tax receivables, arising in fiscal years 2006, 2007 and the first two quarters of fiscal year 2008. Approximately $0.9 million relates to the unrecorded amounts arising from fiscal years 2006 and 2007. Management has assessed the impact of this adjustment and does not believe the amounts are material, either individually or in the aggregate, to any of the prior years' financial statements, and the impact of correcting these errors in the current year was not material to the full fiscal year 2008 financial statements.

Certain information and footnote disclosures normally included in financial statements prepared in accordance with generally accepted accounting principles ("GAAP") in the United States have been combined and or omitted pursuant to such rules and regulations.

Prior to June 1, 2006, we operated as part of Agilent, and not as a stand-alone company. Therefore, the accompanying combined and consolidated financial statements, prior to June 1, 2006, were derived from the accounting records of Agilent using the historical basis of assets and liabilities of Verigy. The expense and cost allocations, prior to June 1, 2006, have been determined on a basis we consider to be a reasonable reflection of the utilization of services provided by Agilent or the benefit received by us from Agilent.

Business Summary

Prior to our initial public offering, we were a wholly-owned subsidiary of Agilent Technologies, Inc. ("Agilent"). We became an independent company on June 1, 2006, when we separated from Agilent. On June 13, 2006, we completed our initial public offering and became a separate stand-alone publicly-traded company focused on technology and innovation in semiconductor testing. We design, develop, manufacture and sell advanced test systems and solutions for the semiconductor industry.

We offer a single platform for each of the two general categories of devices being tested: our V93000 Series platform, designed to test System-on-a-Chip ("SOC"), System-in-a-Package ("SIP") and high-speed memory devices and our V5000 Series platform, designed to test memory devices, including flash memory and multi-chip packages. In the first quarter of fiscal year 2009, we introduced our V6000 Series platform which is the successor to the V5000 platform and was designed to test both flash memory and dynamic random access memory ("DRAM") devices. Our test platforms are scalable across different frequency ranges, different pin counts and different numbers of devices under simultaneous test. The test platforms' flexibility also allows for a single test system to test a wide range of semiconductor device applications. Our single platform strategy allows us to maximize operational efficiencies such as relatively lower research and development costs, engineering headcount, support requirements and inventory risk. This platform strategy also provides economic benefits to our customers by allowing them to move their complex, feature-rich semiconductor devices to market quickly and to reduce their overall costs. In addition to our test platforms, our product portfolio includes advanced analysis tools as well as consulting, service and support offerings such as start-up assistance, application services and system calibration and repair.

As of October 31, 2008, we have installed more than 1,900 V93000 Series systems and nearly 2,600 V5000 Series systems worldwide. We have a broad customer base which includes integrated device manufacturers ("IDMs"), test subcontractors, also referred to as subcontractors or "OSATs" (outsourced sub-assembly and test providers), which includes specialty assembly, package and test companies as well as wafer foundries, and companies that design, but contract with others for the manufacture of, integrated circuits ("ICs") (known as fabless design companies).

Overview of Results

Our total net revenue for fiscal year 2008, was $691 million, down $70 million, or 9.2%, from $761 million in fiscal year 2007. This decrease was due to lower revenue from sales of our memory test systems in fiscal year 2008, partially offset by higher sales of our SOC products and services. The decline in our memory test revenues resulted from substantial declines in the capital spending patterns of our memory device manufacturer customers and of their subcontractor test partners to which we also sell systems. The overall decline in the memory market capital spending reflects continued excess supply and price erosion for memory products, which has resulted in lower manufacturing output and excess test capacity. These factors have caused our customers to delay test system orders and delay delivery of systems ordered. In addition to the memory market downturn, uncertainties in the financial and credit markets, have caused our customers to postpone purchases which have negatively impacted our revenue particularly during our fourth quarter for our SOC business.

Notwithstanding the cyclical weakness in the memory test industry, our SOC business showed considerable strength during fiscal year 2008, with an increase of 40% from fiscal year 2007. We experienced increased demand for our V93000 platform for SOC applications, in particular our Port Scale RF products, driven primarily by strong demand for our customers' devices targeted at wireless, PC and consumer mixed-signal device markets. However, during the fourth quarter of fiscal year 2008, our SOC business weakened, and we began to see an onset of a cyclical downturn. In response to the overall deterioration in the global economy, customers are delaying purchases of capital equipment due to excess capacity as well as to ensure that they are able to sustain operations during this economic crisis.

Our gross margin for fiscal year 2008 was down slightly compared to fiscal year 2007. We recorded net excess and obsolescence inventory charges of $27 million for fiscal year 2008, compared to $8 million recorded for fiscal year 2007, primarily related to our memory business as well as the impact of the introduction of our new V6000 Series system which was released during the first quarter of fiscal year 2009. This was offset by a stronger mix of SOC systems, which generally have a higher gross margin than our memory systems.

Our total operating expenses, including restructuring charges of $2 million, were $259 million in fiscal year 2008, up $18 million, or 7.5%, from fiscal year 2007. This increase in operating expenses from fiscal year 2007 was primarily due to increased spending on research and development initiatives for memory products that were introduced in the first quarter of fiscal year 2009 and SOC products planned for release later in fiscal year 2009, higher share-based compensation, operating expenses associated with the acquisition of Inovys and increases in field selling and governance costs.

Net income for fiscal year 2008 was $28 million, a decrease of 71.1% from the $97 million achieved in fiscal year 2007. The decrease for fiscal year 2008 was primarily due to the overall decline in our memory business, other-than-temporary impairments of $30.7 million related to write-downs of our investments and net excess and obsolescence inventory charges of $27 million in cost of sales. In fiscal year 2008, we generated operating cash flows of $97 million and our cash and cash equivalents balance as of October 31, 2008 was $144 million.

We derive a significant percentage of our net revenue from outside of North America. Net revenue from customers located outside of North America represented 82.6%, 70.8% and 68.4% of total net revenue in fiscal years 2008, 2007 and 2006, respectively. Net revenue in North America was lower by 45.9% in fiscal year 2008 compared to fiscal year 2007 due to the continuing outsourcing by our North American customers to contract manufacturers in Asia. Net revenue in Asia (including Japan) was higher by 5.3% in fiscal year 2008 compared to fiscal year 2007. We expect this trend of increasing sales in Asia to continue as semiconductor manufacturing activities continue to concentrate in that region.

The sales of our products and services are dependent, to a large degree, on customers who are subject to cyclical trends in the demand for their products. These cyclical periods have had, and will continue to have a significant effect on our business since our customers often delay or accelerate purchases in reaction to changes in their businesses and to demand fluctuations in the semiconductor industry. Historically, these demand fluctuations have resulted in significant variations in our results of operations. This was particularly relevant during the second and third quarters of fiscal year 2008 where we saw a significant decrease in revenue from our memory platform and experienced some order postponements. Due to our product diversification, however, we were able to partially offset the effect of this downturn in demand for flash memory systems with increased demand for our SOC products fueled by the wireless, PC and consumer mixed-signal device markets. However, during the fourth quarter of fiscal year 2008, we also began to see the SOC business weaken due to the deteriorating global economy, which has negatively impacted the entire semiconductor industry. The sharp swings in the semiconductor industry in recent years have generally affected the semiconductor test equipment and services industry more significantly than the overall capital equipment sector.

Furthermore, we sell to a variety of customers, including subcontractors. Because we sell to subcontractors, which during market troughs tend to decrease or postpone orders for new test systems and test services more quickly and dramatically than other customers, downturns may cause a quicker and more significant adverse effect on our business than on the broader semiconductor industry. In addition, although a decline in orders for semiconductor capital equipment may accompany or precede the timing of a decline in the semiconductor market as a whole, recovery in semiconductor capital equipment spending may lag the recovery by the semiconductor industry.

Although our visibility into when the semiconductor industry will recover remains poor, we will continue to invest in products in anticipation of a cyclical recovery in the market, and are working on initiatives to expand our customer base. We remain committed to projects and programs which we believe will allow us to increase our market share and expand into higher growth segments. In addition, in response to the weakened economic conditions, we have commenced actions targeted at reducing our quarterly operating cost structure to enable us to achieve break-even results at revenue levels of $125 million a quarter. In order to achieve this objective, we announced in the first quarter of fiscal year 2009, that we are implementing a restructuring program to streamline our organizations and further reduce our operating costs. As part of this restructuring program, we plan to reduce our global workforce through a combination of attrition, voluntary and involuntary terminations and other workforce reduction programs consistent with local legal requirements. We estimate that we will incur restructuring charges in the range of $6 million to $9 million for employee terminations costs, asset impairments, costs of consolidating facilities, and other related costs in fiscal year 2009. We anticipate quarterly costs savings of between $12 million and $15 million when this restructuring program is substantially completed in fiscal year 2009, of which $4 million to $6 million relate to restructuring activities as described above and the remaining amounts relate to other cost saving initiatives.

Critical Accounting Policies and Estimates

The preparation of financial statements in accordance with U.S. GAAP requires management to make estimates and assumptions that affect the amounts reported in our combined and consolidated financial statements and accompanying notes. Management bases its estimates on historical experience and various other assumptions believed to be reasonable. Although these estimates are based on management's knowledge of current events and of actions that may impact the company in the future, actual results may be different from the estimates. Our critical accounting policies are those that affect our financial statements materially and involve difficult, subjective or complex judgments by management. Those policies include revenue recognition, restructuring charges, inventory valuation, warranty, separation costs, share-based compensation, retirement and post-retirement plan assumptions, valuation of goodwill and intangible assets, valuation of marketable securities, and accounting for income taxes.

Revenue recognition. Net revenue is derived from the sale of products and services and is adjusted for estimated returns and allowances, which historically have been insignificant. Consistent with the SEC's Staff Accounting Bulletin No. 104, or "SAB 104," we recognize revenue on the sale of semiconductor test equipment when there is persuasive evidence of an arrangement, delivery has occurred or services have been rendered, the sales price is fixed or determinable and collectibility is reasonably assured. Delivery is considered to have occurred when title and risk of loss have transferred to the customer, for products, or when service has been performed. We consider the price to be fixed or determinable when the price is not subject to refund or adjustments. At the time we take an order, we evaluate the creditworthiness of our customers to determine the appropriate timing of revenue recognition. For sales or arrangements that include customer-specified acceptance criteria, including those where acceptance is required upon achievement of performance milestones or fulfillment of other future obligations, revenue is recognized after the acceptance criteria have been met. If the criteria are not met, then revenue is deferred until such criteria are met or until the period(s) over which the last undelivered element is delivered. To the extent that a contingent payment exceeds the fair value of the undelivered element, we defer the portion of revenue related to the contingent payment.

Our product revenue is generated predominantly from the sales of various types of test equipment. Software is embedded in many of our test equipment products, but the software component is considered to be incidental. For revenue arrangements that include multiple elements, we recognize revenue in accordance with EITF 00-21. For products that include installation, if we have previously successfully installed similar equipment, product revenue is recognized upon delivery, and recognition of installation revenue is delayed until the installation is complete. Otherwise, neither the product nor the installation revenue is recognized until the installation is complete. Revenue from services includes extended warranty, customer support, consulting, training, and education services. Service revenue is deferred and recognized over the contractual period or as services are rendered to the customer. For example, customer support contracts are recognized ratably over the contractual period, while training revenue is recognized as the training is provided to the customer. In addition, all of the revenue recognition criteria described above must be met before service revenue is recognized. We use objective evidence of fair value to allocate revenue to elements in multiple element arrangements and recognize revenue when the criteria for revenue recognition have been met for each element. In the absence of objective evidence of fair value of a delivered element, we allocate revenue to the fair value of the undelivered elements and the residual revenue to the delivered elements. The price charged when an element is sold separately generally determines fair value.

Restructuring. We recognize a liability for restructuring costs when the liability is incurred. The restructuring accruals are based upon management estimates at the time they are recorded. These estimates can change depending upon changes in facts and circumstances subsequent to the date the original liability was recorded. The three main components of our restructuring charges are workforce reductions, consolidating facilities and asset impairments. Workforce-related charges are accrued when it is determined that a liability has been incurred, which is generally when individuals have been notified of their termination dates and expected severance payments. Plans to eliminate excess facilities result in charges for lease termination fees and future commitments to pay lease charges, net of estimated future sublease income. We recognize charges for elimination of excess facilities when we have vacated the premises. Asset impairments primarily consist of property, plant and equipment associated with excess facilities being eliminated, and are based on an estimate of the amounts and timing of future cash flows related to the expected future remaining use and ultimate sale or disposal of the property, plant and equipment. The charges associated with consolidating facilities and asset impairment charges incurred by Agilent prior to our separation were allocated to Verigy to the extent the underlying benefits related to our business. These estimates were derived using the guidance of Statement of Financial Accounting Standards No. 144, "Accounting for the Impairment or Disposal of Long-Lived Assets" ("SFAS No. 144"), Staff Accounting Bulletin 100, "Restructuring and Impairment Charges" ("SAB 100"), Emerging Issues Task Force 94-3, "Liability Recognition for Costs to Exit an Activity (Including Certain Costs Incurred in a Restructuring)" ("EITF 94-3") and lastly, Statement of Financial Accounting Standards No. 146, "Accounting for Exit or Disposal Activities" ("SFAS No. 146"), which was effective for exit and disposal activities initiated after December 31, 2002. If the amounts and timing of cash flows from restructuring activities are significantly different from what we have estimated, the actual amount of restructuring and asset impairment charges could be materially different, either higher or lower, than those we have recorded. In order to address the cyclical downturn and the negative impact on our results driven by the deteriorating global economy, we announced in the first quarter of fiscal year 2009, that we are implementing a restructuring program to streamline our organizations and further reduce our operating costs. As part of this restructuring program, we plan to reduce our global workforce through a combination of attrition, voluntary and involuntary terminations and other workforce reduction programs consistent with local legal requirements. We estimate that we will incur restructuring charges in the range of $6 million to $9 million for employee terminations costs, asset impairments, costs of consolidating facilities, and other related costs in fiscal year 2009. We anticipate quarterly costs savings of between $12 million and $15 million when this restructuring program is substantially completed in fiscal year 2009, of which $4 million to $6 million relates to restructuring activities as described above and the remaining amounts relate to other cost saving initiatives.

MANAGEMENT DISCUSSION FOR LATEST QUARTER

The following discussion should be read in conjunction with the condensed consolidated financial statements and notes thereto included elsewhere in this Quarterly Report on Form 10-Q. This report contains forward-looking statements including, without limitation, statements regarding manufacturing operations, increase in sales and growth of business in Asia, research and development activities and expenses, variations in quarterly revenues and operating results, trends, cyclicality, seasonality and growth in the markets we sell into, our strategic direction, expenditure in research and development, anticipated benefits from our operating model, our future effective tax rate, new product introductions, growth in service revenue, our liquidity position, our ability to generate cash from continuing operations, our expected growth, the potential impact of adopting new accounting pronouncements, our potential future financial results, the quality of our marketable securities, our purchase commitments, our obligation and assumptions about our retirement and post-retirement benefit plans, the impact of our variable cost structure, and our lease payment obligations that involve risks and uncertainties. Additional forward-looking statements can be identified by words such as “anticipated,” “expect,” “believes,” “plan,” “predicts,” and similar terms. Our actual results could differ materially from the results contemplated by these forward-looking statements due to various factors, including those discussed under “Part II, Item 1A., Risk Factors” and elsewhere in this report.



Overview



Prior to our initial public offering, we were a wholly-owned subsidiary of Agilent Technologies, Inc (“Agilent”). We became an independent company on June 1, 2006, when we separated from Agilent. On June 13, 2006, we completed our initial public offering and became a separate stand-alone publicly-traded company incorporated in Singapore focused on technology and innovation in semiconductor testing. We design, develop, manufacture and sell advanced test systems and solutions for the semiconductor industry. We offer a single platform for each of the two general categories of devices being tested: our 93000 Series platform, designed to test System-on-a-Chip (SOC), System-in-a-Package (SIP) and high-speed memory devices, and our V5000 Series platform, designed to test memory devices, including flash memory and multi-chip packages. Our test solutions are both scalable and flexible. Our test platforms are scalable across different frequency ranges, different pin counts and different numbers of devices under simultaneous test. Our test platforms’ flexibility allows for a single test system to test a wide range of applications for semiconductor devices. Our scalable platform architecture provides us with internal operating model efficiencies such as relatively lower research and development costs, engineering headcount, support requirements and inventory risk. The scalability and flexibility of our test solutions also provides economic benefits to our customers by allowing them to get their complex, feature-rich semiconductor devices to market quickly and to reduce their overall costs. In addition to our test equipment, our solutions include advanced analysis tools as well as consulting, service and support offerings such as start-up assistance, application services and system calibration and repair.



We have a broad customer base, with almost 1,900 93000 Series systems and more than 2,550 V5000 Series systems installed worldwide as of July 31, 2008. Our customers include integrated device manufacturers (“IDMs’), test subcontractors, also referred to as subcontractors, which includes specialty assembly, package and test companies as well as wafer foundries, and fabless design companies.



Basis of Presentation and Separation from Agilent



Our fiscal year end is October 31, and our fiscal quarters end on January 31, April 30 and July 31. Unless otherwise stated, all dates refer to our fiscal year and fiscal periods.



Amounts included in the accompanying condensed consolidated financial statements are expressed in U.S. dollars. The accompanying condensed consolidated financial statements have been prepared pursuant to the rules and regulations of the Securities and Exchange Commission (“SEC”). Certain amounts in the condensed consolidated financial statements for the three and nine months ended July 31, 2007 were reclassified to conform to the presentation used for the three and nine months ended July 31, 2008. In the third quarter of fiscal year 2008, we recorded a $2.6 million adjustment in other income, net, related to foreign currency remeasurement gains. These gains relate to a failure to remeasure certain foreign currency assets and liabilities, primarily value added tax receivables, arising in fiscal years 2006, 2007 and the first two quarters of fiscal year 2008. Management has assessed the impact of this adjustment and does not believe the amounts are material, either individually or in the aggregate, to any of the prior years’ financial statements, and the impact of correcting these errors in the current year is not expected to be material to the full fiscal year 2008 financial statements. Certain information and footnote disclosures normally included in financial statements prepared in accordance with generally accepted accounting principles (“GAAP”) in the United States have been condensed or omitted pursuant to such rules and regulations. The following discussion should be read in conjunction with our 2007 Annual Report on Form 10-K.

Overview of Results



Our total net revenue for the three months ended July 31, 2008, was $179 million, down $25 million, or 12.3%, from the comparable period in fiscal year 2007, but up 10.5% sequentially. This decrease was due to lower revenue from sales of our memory test systems in the third quarter of fiscal year 2008. The decline in our memory test revenues resulted from substantial declines in the capital spending patterns of our memory device manufacturer customers and of their subcontractor test partners to which we also sell systems. The overall decline in the memory market capital spending reflects continued excess supply and price erosion for memory products, which has resulted in lower manufacturing output and excess test capacity. These factors have caused our customers to delay test system orders and delay delivery of systems ordered.



Notwithstanding the cyclical weakness in the memory test industry, our SOC business showed continued strength. We experienced increased demand for our 93000 platform for SOC applications, in particular our Port Scale RF products, driven primarily by strong demand for our customers’ devices targeted at wireless, PC and consumer mixed-signal device markets. For the three months ended July 31, 2008, three of our SOC customers each accounted for more than 10% of our total net revenue. In contrast, for the three months ended July 31, 2007, one of our memory customers accounted for more than 10% of our total net revenue.



Our gross margin for the three months ended July 31, 2008, was 46.4%, an increase of 0.8 percentage points from the comparable period in fiscal year 2007. Gross margin improvement was primarily attributable to the stronger mix of SOC systems, which generally have a higher gross margin than our memory systems, sold during the quarter. Excluding the impact of $1.2 million of restructuring charges in cost of sales relating to an early retirement program recently initiated, gross margin would have been essentially flat compared to the second quarter of fiscal year 2008.



Our total operating expenses, including separation and restructuring charges, were $68 million in the three months ended July 31, 2008, up $6 million, or 9.7%, from the comparable period in fiscal year 2007, and up by $5 million sequentially. This increase in operating expenses from the comparable quarter of fiscal year 2007 was primarily due to increased spending on research and development initiatives for memory products that are planned for introduction by the end of the calendar year and SOC products planned for release during the next 9 to 12 months, higher share-based compensation and increases in field selling and governance costs.



Net income for the three and nine months ended July 31, 2008 was $18 million and $64 million, a decrease of 40.0% and 1.5% from the $30 and $65 million achieved in the comparable periods in fiscal year 2007. This decrease was primarily due to the overall decline in the memory market capital spending, partially offset by our revenue growth in SOC testers and increased revenue generated from our Port Scale RF product. For the nine months ended July 31, 2008, we generated operating cash flows of $93 million and our cash and cash equivalents balance as of July 31, 2008 was $218 million.



We derive a significant percentage of our net revenue from outside of North America. Net revenue from customers located outside of North America represented 86.0% and 85.8% of total net revenue in the three months ended July 31, 2008 and 2007, respectively. Net revenue in North America was lower by 13.8% during the three months ended July 31, 2008, compared to the same period of fiscal year 2007, due to the continuing outsourcing by our North American customers to contract manufacturers in Asia. Net revenue in Asia (including Japan) was higher by 11.4% in the three months ended July 31, 2008, compared to the same period of fiscal year 2007. We expect this trend of increasing sales in Asia (including Japan) to continue as semiconductor manufacturing activities continue to concentrate in that region.



The sales of our products and services are dependent, to a large degree, on customers who are subject to cyclical trends in the demand for their products. These cyclical periods have had and will have a significant effect on our business since our customers often delay or accelerate purchases in reaction to changes in their businesses and to demand fluctuations in the semiconductor industry. Historically, these demand fluctuations have resulted in significant variations in our results of operations. This was particularly relevant during the second and third quarters of fiscal year 2008 where we saw a significant decrease in revenue from our memory platform and experienced some order postponements. Due to our product diversification, however, we were able to partially offset the effect of this downturn in demand for flash memory systems with increased demand for our SOC products fueled by the wireless, PC and consumer mixed-signal device markets. The sharp swings in the semiconductor industry in recent years have generally affected the semiconductor test equipment and services industry more significantly than the overall capital equipment sector. Furthermore, we sell to a variety of customers, including subcontractors. Because we sell to subcontractors, which during market troughs tend to decrease or postpone orders for new test systems and test services more quickly and dramatically than other customers, any downturn may cause a quicker and more significant adverse effect on our business than on the broader semiconductor industry. In addition, although a decline in orders for semiconductor capital equipment may accompany or precede the timing of a decline in the semiconductor market as a whole, recovery in semiconductor capital equipment spending may lag the recovery by the semiconductor industry.



Although our visibility into the memory market remains poor, we continue to invest in our memory products in anticipation of a cyclical recovery in the market and are working on initiatives to expand our memory customer base. In addition, we will place stronger emphasis on our SOC business focusing our attention and resources on high growth segments of the markets we address such as highly-integrated RF, consumer mixed-signal, high-speed memory and yield improvement.



Critical Accounting Policies and Estimates



The preparation of financial statements in accordance with U.S. GAAP requires management to make estimates and assumptions that affect the amounts reported in our condensed consolidated financial statements and accompanying notes. Management bases its estimates on historical experience and various other assumptions management believes to be reasonable. Although these estimates are based on management’s knowledge of current events and of actions that may impact the Company in the future, actual results may be different from the estimates. Our critical accounting policies are those that affect our financial statements materially and involve difficult, subjective or complex judgments by management. Those policies include revenue recognition, restructuring charges, inventory valuation, warranty, share-based compensation, retirement and post-retirement plan assumptions, valuation of goodwill and intangible assets, valuation of marketable securities, and accounting for income taxes.



An accounting policy is deemed to be critical if it requires an accounting estimate to be made based on assumptions about matters that are highly uncertain at the time the estimate is made, and if different estimates that reasonably could have been used or changes in the accounting estimate that are reasonably likely to occur could materially change the financial statements. There have been no significant changes during the three and nine months ended July 31, 2008 to the items that we disclosed as our critical accounting policies and estimates in Management’s Discussion and Analysis of Financial Condition and Results of Operations included in our Annual Report on Form 10-K for the year ended October 31, 2007, filed with the Securities and Exchange Commission on December 21, 2007.



Recent Accounting Pronouncements



In September 2006, the FASB issued SFAS No. 157, “Fair Value Measurements” (“SFAS No. 157”). The purpose of SFAS No. 157 is to define fair value, establish a framework for measuring fair value and enhance disclosures about fair value measurements. In February 2008, the FASB issued FASB Staff Position (FSP) 157-1, “Application of FASB Statement No. 157 to FASB Statement No. 13 and Other Accounting Pronouncements That Address Fair Value Measurements for Purposes of Lease Classification or Measurement under Statement 13” (“FSP 157-1”) and FSP 157-2, “Effective Date of FASB Statement No. 157” (“FSP 157-2”). FSP 157-1 amends SFAS No. 157 to remove certain leasing transactions from its scope. FSP 157-2 delays the effective date of SFAS No. 157 for all non-financial assets and non-financial liabilities, except for items that are recognized or disclosed at fair value in the financial statements on a recurring basis (at least annually), until the beginning of the first quarter of fiscal year 2010. The measurement and disclosure requirements related to financial assets and financial liabilities are effective for us beginning in the first quarter of fiscal year 2009. We are currently evaluating whether SFAS No. 157 will result in a change to our fair value measurements.



In February 2007, the FASB issued SFAS No. 159, “The Fair Value Option for Financial Assets and Financial Liabilities” (“SFAS No. 159”), which permits entities to choose to measure many financial instruments and certain other items at fair value that are not currently required to be measured at fair value. SFAS No.159 will be effective for us beginning in the first quarter of fiscal year 2009. We are currently evaluating the impact of adopting SFAS No. 159 on our financial position, cash flows and results of operations.



In December 2007, the FASB issued SFAS No. 141 (revised 2007), “Business Combinations” (“SFAS No. 141(R)”). SFAS No. 141(R) amends SFAS No. 141 and provides revised guidance for recognizing and measuring identifiable assets and goodwill acquired, liabilities assumed and any noncontrolling interest in an acquiree. It also provides disclosure requirements to enable users of the financial statements to evaluate the nature and financial effects of a business combination. It is effective for fiscal years beginning on or after December 15, 2008 and will be applied prospectively. We are currently assessing the impact that SFAS No. 141(R) may have on our consolidated financial statements upon adoption in fiscal year 2010.

CONF CALL

Judy Davies

Thank you, Michelle, and good afternoon, everyone. Welcome to our financial teleconference for Verigy's third quarter and fiscal year 2008, which ended July 31st. I am Judy Davies and I am joined by Keith Barnes, our Chairman, CEO and President, and Bob Nikl, our CFO.

Our Q3 financial press release was sent out today over the Business Wire and is available on our website. Should you not be able to locate this press release, please contact me at 408-864-7549. A replay of this call will be available via telephone and webcast from August 21st through September 4th. You may access the call by going to the Investor Relations section of our website.

As always we will be making forward-looking statements today, including the revenue and earnings guidance for Q4. These forward-looking statements are based on current information and estimates and are subject to a number of risks and uncertainties that could cause actual results to differ materially from those in the forward-looking statements.

Factors that may cause results to differ materially from those in the forward-looking statements are discussed in our most recent Form 10-Q and 10-K filings. These forward-looking statements, including guidance, provided during today's call are only valid as of this date and Verigy undertakes no obligation to update the forward-looking statements or our financial guidance. The only persons authorized to give financial guidance for Verigy are Keith Barnes, our Chairman, CEO and President, and Bob Nikl, our CFO.

At the conclusion of our prepared remarks, we will open up the call for questions. As a reminder, this conference call is being recorded and will be available for replay in the Investor Relations section of our website at www.verigy.com.

Now I will turn the call over to Keith.

Barnes Keith

Thanks Judy. Good afternoon everyone and thank you for joining us today. In my prepared comments, I will briefly discuss the macro economic climate because we think this has had an effect on our business. I will review the financial highlights for the quarter and present an update on our products. Bob Nikl, our CFO will provide additional details on our Q3 financial results as well as our next quarter's guidance.

As you know the recent stream of news coverage has been focused on high energy prices, increased commodity prices, increasing unemployment rates and further troubles in the financial sector with the ongoing problems in the mortgage and housing markets in the US and Europe.

Purchasing power, income and wealth have been eroded and credit remains tight. These trends have heightened fears about the economic outlook and pushed consumer’s sentiment down sharply. While there are positive signs such as strong global PC and cell phone sales. It’s difficult to predict how the overall economic conditions will impact our business over the next couple of quarters.

For our Q3, we delivered solid financial results that met our guidance for the 9th consecutive quarter. Total revenue was $179 million, a 10% increase from last quarter, while earnings per share on a GAAP basis were $0.29, an increase of 26% from Q2.

I would like to spend a few minutes discussing our business, beginning with the flash memory business. The flash memory market is driven by increasing demand for memory rich consumer product such as cell phones, MP3 players, game consoles and digital cameras. Demand for these types of products has been one of the strongest growth drivers of units and capacity for semiconductor memory manufacturers.

Big growth for flash memory and MCP has remained at high levels of consumption of memories and continues to reach all prime heights. So, if this is the case, why have memory tester sales dropped so sharply and suddenly? As you know the flash memory market is characterized by sharp swings in supply and demand. In addition to the volatility of this market, memory semiconductors have been challenged -- our semiconductor manufacturers have been challenged by aggressive pricing pressure, excess inventory and changing market dynamics. All of these have created significant turmoil in the memory market over the last few quarters.

As a result, many memory manufacturers continue to take steps to preserve cash by cutting their CapEx budgets, delaying equipment purchases or postponing new fabs. Additionally, some memory manufacturers have established joint ventures or strategic alliances in an attempt to gain greatest scale and resources in order to remain competitive. These are actions have contributed to a historically low memory tester buy rate. For calendar year Q2 or for calendar Q2 it was less than 1%.

One would ask, when will the memory market rebound? Some people are expecting a recovery in 2009, but on one really knows. What we do know however is that digcounts continue to grow and as we have said in the past growing digcount drive tester sales. At some point memory manufacturers that have been waiting on the sidelines maybe compelled by again. There are some encouraging signs emerging from the market with new flash memory applications such as solid state disk drives, high depth video camcorders and flash memories potentially replacing DRAM and servers.

We believe that these applications could bolster sales of our flash memory testers in the future. While, the memory market is sorting itself out, we have been working on two strategic initiatives expanding our memory customer base and investing in new memory products. We have won several new memory evaluations for engineering development and we believe that these wins will eventually transition into high volume manufacturing orders at several key accounts. We also continue to invest in important R&D programs and remain on schedule to rollout major new products this calendar year.

We believe these products will significantly expand our memory served developer market. We cannot provide any specific details today, but we are very excited about the potentials in this space. We have also been placing stronger emphasize on our SOC business, which has been doing very well over the last few quarters. As you know, we support high-speed memory applications from our SOC division.

The high-speed memory market is characterized by devices with data rates in excess of 1 gigabit per second. The ATE revenue opportunity for this high-speed memory's is estimated to be about $60 million in 2008 and forecasted to reach about $200 million in 2010. This is a compounded annual growth rate of about 82%. We believe we are well positioned to capture a significant share of this market. Our 93K HSM product is already being used in volume manufacturing to test devices running between 2 & 4 gigabits per second and in engineering applications at virtually every high-speed memory manufacturer in the world.

We believe our competition is behind in this area. During the quarter, we introduced our HSM 93K 2200 system at the SEMICON West Trade show in San Francisco. This is the first tester available on the market. It is capable of testing 64 devices in parallel at speed for final test. With DDR3 memory is approaching 2 gigabit IOC boundary, we believe the HSM2200 offers the right combination of parallelism, speed and cost of ownership.

As DDR3 ramps to high volume, the HSM2200 will be upgradeable to a 128 site configuration by swapping our channel cards. This is the beauty of our scalable platform architecture. Our 93K HSM offers a unique cost effective and flexible growth path and customers are responding favorably.

In Q3 we received an order for a high-speed memory system which will be used for the characterization of GDDR5 devices. We also won repeat orders from major DRAM manufacturers for testing their DDR3 devices.

Now, I would like to turn to the total SOC business, including HSM. We are pleased to report $129 million of revenue, our highest revenue quarter ever for this product line. In addition, we delivered more than 100 testers with nearly half of these coming from the Flextronics China facility. We’ve now shift more than 300 SOC in memory systems from China.

Sales of the 93K were fueled by a healthy demand for wireless, PC and consumer mix signal devices, as well as several key wins during the quarter which I would like to highlight for you.

The first of these was a benchmark and a major European IDM against two other well known North American RF ATE suppliers. Verigy was selected based on with technical capability of the Port Scale RF product, as well as the flexibility in cost of ownership of the 93K platform. We believe that this win will lead to multiple systems and upgrade orders over the next 12 months.

We continue to be encouraged by strong customer interest in Port Scale RF. Q3 represented a record quarter for orders and revenue of Port Scale RF products. Since its introduction about a year ago, we’ve already installed nearly 100 Port Scale RF systems for several new opportunities still ahead of us. We’ve also received a multiple system order for the 93K from a large IDM to test their highly complex SOC device. The same customer placed a repeat order for additional 93Ks in our current quarter.

Another important win came from a large Japanese IDM that will use the 93K for development of their next generation DVD product, and we expect this customer will drive volume purchases in the OSAT channel over the next several quarters. The overall 93K utilization rate among OSATs was 88% in June and increased to 91% at the end of July.

Despite these many wins we are not immune to the current economic conditions that are causing semiconductor manufacturers to reassess their purchasing plants. In recent weeks, customers have become more cautious with their outlook and a few have pushed out of orders. As a result, we expect to see some softening in Q4 as reflected in our next quarter guidance.

Now I would like to discuss a new addition to our Board of Directors and a newly creative position of Chief Operating Officer. We are pleased to add Bobby Cheng to our Board of Directors. Bobby will officially join us in September and brings a wealth of business and leadership experience throughout Asia.

We are pleased that Jorge Titinger has joined the company, as the company’s Chief Operating Officer. As COO, Jorge will be responsible for advancing or is responsible for advancing the performance of our products, optimizing our business operations and driving higher overall product quality. Jorge has a strong background in operations with KLA-Tencor and Applied Materials. Both Bobby and Jorge will bring tremendous value to Verigy.

To summarize, Q3 was a good quarter for Verigy, especially given the challenges in the memory market and the macro economic environment. We will actively pursue opportunities in the SOC and memory market through continued customer focus and new product development. We feel good about our performance. We feel that we are position to accelerate faster than our competitors and capture market share when the upturn comes.

And with that, I will turn the call over to Bob.

Bob Nikl

Thank you, Keith and good afternoon everyone. I will review our financial performance for the third quarter, provide an update on our share repurchase program and present our guidance for Q4.

Overall we were very pleased with our results this quarter, which met both our revenue and earnings expectations. Orders in the quarter were $165 million, which resulted in a book-to-bill ratio of 0.92 and ending backlog shippable in the next six months stood at $205 million. However, we clearly began to see some softening in the last few weeks and customers are become more cautious and adopted a wait and see attitude.

Orders by region were as follows, Asia-Pacific 81%, Americas 11% and Europe 8%. The orders split between IDM and fabless versus OSATs was 40% and 60% respectively, compared to 61% and 39% respectively last quarter. In addition, this quarter represented a record order quarter for 93Ks in the OSAT channel.

Revenue of $179 million represented a 10% increase from last quarter and fully diluted GAAP earnings per share of $0.29, compares to $0.23 per share last quarter, a 26% increase. Regionally, the revenue mix was as follows, Asia-Pacific 82%, Americas 14% and Europe 4%.

Overall this order and revenue composition has remained fairly consistent over the past few quarters. Revenue split by products and services was 77% and 23% respectively and was essentially unchanged, compared to 75% and 25% last quarter. Services revenue increased 3% over the last quarter to $41 million and was again a new record for this business, which is becoming an important part of our recurring revenue stream.

During the quarter, we had three greater than 10% revenue customers, but we are not in a position to disclose, who they were. However, we are pleased with the volume of business, which earlier design wins are now yielding. As previously stated, revenue for our SOC products was $129 million or 72% of total revenue, as our Port Scale RF products continued to account for an increasing portion of the revenue mix. In fact Port Scale RF revenue nearly doubled over last quarter.

Revenue for our memory products was approximately $9 million, an increase of $3 million from last quarter and continues to reflect memory customers reducing or delaying their test equipment purchases. The timing of rebound and flash memory remains uncertain.

Gross margin on a GAAP basis, was 46.4% compared to 47.5% last quarter. Excluding the impact of $1.2 million worth of restructuring charges and cost of sales for a relatively small early retirement program, gross margin would have been 47.2%, essentially flat with last quarter.

R&D spending was $27 million or 15.1% of revenue and was $1 million higher than last quarter. As Keith mentioned earlier, we continue to invest in programs, where we believe we can expand our [SAM] and gain additional share. SG&A was $40 million or 22.3% of revenue, an increase of $3 million from last quarter. The higher spend was due to cost associated with increased sales and marketing activities as well as higher variable compensation expense.

Total share-based compensation expense was $4.3 million compared to $4.2 million last quarter and consistent with our earlier guidance. Operating profit was $15 million or 8.4% compared to $14 million or 8.6% last quarter. Excluding a total of $2.1 million related to the early retirement program mentioned previously, operating margin would have been 9.7%.

Other income was $6 million compared to $3 million in Q2 and this sequential increase was due to the impact of a non-recurring remeasurement gain of $2.4 million recognized on Euro denominated VAT receivables that were collected during the quarter. From a bottom line perspective, the total cost of the early retirement program and the net remeasurement gain essentially offset each other.

Our provision for income taxes was $3 million unchanged from last quarter. We are currently estimating that our full year tax rate for this year will be between 12% and 13%. Net income of $18 million was $0.29 per share on a fully diluted basis compared to 14 million or $0.23 per share last quarter.

Now I would like to review our balance sheet. We ended the quarter with $467 million of cash and marketable securities, an increase of $13 million from last quarter. Free cash flow was $23 million. We were active in returning value to our shareholders by purchasing approximately $640,000 of our shares and an average share price of slightly less than $23. While remaining repurchase authorization totals approximately $5.4 million shares and $135 million and we expect to repurchase approximately $2 million shares this quarter.

Accounts receivable was $87 million and DSO was 44 days, a decrease of six days from last quarter. 93% of our trade receivables are current at quarter end with nearly all less than 60 days. Inventory was $86 million compared to $81 million last quarter and days of supply was 86 days, a decrease of two days. Depreciation and amortization expense was $4 million, as was CapEx spending. Fulltime regular headcount was approximately 1600 down slightly from Q2.

Now for our next quarter guidance, as a result of the recent weakening market conditions, we expect revenue to be in the range of $155 million to $165 million and GAAP net income on a fully diluted basis to be in the range of $0.12 to $0.17 per share. The earnings per share calculation, assumes weighted average shares at the end of our fiscal year to be approximately $60 million.

This concludes our formal remarks on the quarter and we'll now open the call for questions. Before I turn the call over to Michelle to give the Q&A instructions, let me request that you limit yourself to one question in order to give everyone an opportunity to participate. Michelle, please open the line to questions.

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