Novellus Systems Inc. CEO RICHARD HILL bought 10,000 shares on 4-25-2008 at $21.82
Novellus Systems, Inc. is a California corporation organized in 1984. Novellus primarily develops, manufactures, sells and supports equipment used in the fabrication of integrated circuits, commonly called chips or semiconductors. Customers for this equipment manufacture chips for sale or for incorporation in their own products, or provide chip-manufacturing services to third parties. Novellus also develops, manufactures, sells and supports grinding, lapping and polishing equipment for a broad spectrum of industrial applications.
Integrated circuits are generally built on a silicon wafer substrate, and include a large number of different components such as transistors, capacitors and other electronic devices. These components are connected on the silicon wafer by multiple layers of wiring, called interconnects. To build an integrated circuit, transistors are first fabricated on the surface of the silicon wafer. Wiring and insulating structures are then added as alternating thin-film layers in a series of manufacturing process steps. Typically, a first layer of dielectric (insulating) material is deposited on top of the transistors. If the conductive material used is aluminum, subsequent metal layers are deposited on top of this base layer, etched to create the conductive lines that carry the electricity, and then covered with dielectric material to create the necessary insulation between the lines. Following each deposition step, a planarization or polishing process is employed to achieve a flat surface for the manufacturing steps that follow. To construct copper wires, the manufacturing process used is a mirror image of that described for aluminum: the insulator is etched and the copper wiring is deposited within the etched insulator. Building either copper or aluminum wiring requires these manufacturing steps to be repeated many times. Advanced chip designs may require more than 500 process steps.
Novellus semiconductor manufacturing products are used in a number of different process steps. Our advanced deposition systems use chemical vapor deposition (CVD), physical vapor deposition (PVD), and electrochemical deposition (ECD) processes to form the interconnects in an integrated circuit. Our High-Density Plasma CVD (HDP-CVD) and Plasma-Enhanced CVD (PECVD) systems employ a chemical plasma to deposit dielectric material within the gaps formed by the etching of aluminum, or as a blanket film which can be etched with patterns for depositing conductive materials into the etched dielectric. Our CVD Tungsten systems are used to deposit small tungsten conductive lines or plugs between layers of metal. Our PVD systems deposit conductive aluminum and copper metal layers by sputtering metal atoms from the surface of a target source. Our Electrofill tm ECD systems deposit copper to form the conductive wiring on integrated circuits using copper interconnects.
Beginning in 2001, Novellus expanded beyond deposition technologies with a series of business acquisitions. In 2001, we acquired GaSonics International Corporation, a manufacturer of systems used to clean and prepare a wafer surface. In 2002, we acquired SpeedFam-IPEC, Inc., a manufacturer of chemical mechanical planarization (CMP) products. In 2004, we further diversified by acquiring Peter Wolters AG (Peter Wolters), a German company specializing in lapping and polishing equipment sold for a broad range of industrial applications. With the acquisition of Peter Wolters, Novellus entered into market sectors beyond semiconductor manufacturing. In November 2005, we acquired Voumard Machine Co. SA (Voumard), a manufacturer of high-precision machine tools based in Neuchatel, Switzerland. The Voumard acquisition further expanded Peter Wolterâ€™s product offerings to include specialized, high-precision grinding equipment.
The headquarters of Novellus Systems, Inc. is located at 4000 North First Street, San Jose, California 95134. The main telephone number is (408) 943-9700.
Additional information about Novellus is available on our web site at www.novellus.com. Annual Reports on Form 10-K, Quarterly Reports on Form 10-Q, and Current Reports on Form 8-K, as well as amendments to those reports, filed or furnished pursuant to Section 13(a) or 15(d) of the Securities Exchange Act of 1934, as amended (Exchange Act) are available on the web site free of charge. These reports are available as soon as reasonably practicable after we electronically file them with the Securities and Exchange Commission (SEC). Information contained on the web site is not part of this Annual Report on Form 10-K or of our other filings with the SEC.
Semiconductor Industry Background
For more than twenty years the semiconductor industry has grown rapidly as a result of increasing demand for personal computers, the expansion of the Internet and the telecommunications industry, and the emergence of new high technology products for the consumer. In recent years, growth has moderated, and there are signs that the industry is maturing. While unit demand for chips continues to rise, their average selling prices continue to decline. Semiconductor equipment is a major factor in the cost structure of the semiconductor industry, and there is growing pressure on chip manufacturers to reduce manufacturing costs while increasing the performance of their products. The semiconductor industry has also been historically cyclical, with periods of rapid expansion followed by periods of over-capacity.
Several technological trends characterize integrated circuit manufacturing. Perhaps the most prominent of these trends is the increasing density of the integrated circuit. Mooreâ€™s Law, first postulated in the mid-1960s and still substantially accurate more than 40 years later, states that the density of the circuitry on an individual semiconductor chip doubles every 18 months. Todayâ€™s advanced devices are being manufactured with line widths as small as 45 nanometers, with up to eleven layers of interconnect circuitry. By increasing circuit density, manufacturers can pack more electronic components on a given surface area, and thereby provide higher performance at about the same cost.
Another trend worth noting is the transition to copper from aluminum wiring as the primary conductive material in semiconductor devices. Copper has a lower electrical resistance value than aluminum, and provides a number of performance advantages. Because of the superior properties of copper, a device made with copper typically requires fewer metal layers than one made with aluminum, providing a considerable reduction in manufacturing cost. In comparison to aluminum, copper wiring also allows a substantial improvement in device speed and a significant reduction in device power consumption.
A similar transition is underway from traditional insulating films made of silicon oxide to insulators with a low dielectric constant, or â€ślow-k.â€ť Low-k dielectrics reduce the capacitance between metal lines in a device, increasing speed and lowering power consumption. However, low-k materials are more fragile than silicon oxide, and this poses a host of new challenges to the industry in integrating the new materials into existing manufacturing processes.
Another trend in the industry is to continue to increase the wafer size. Semiconductor device manufacturers have migrated to 300mm wafers because of the potential manufacturing cost advantages in comparison to 200 mm wafers. The 300mm wafers provide in excess of 2.25 times the number of chips per wafer, and may provide significant economies of scale in the manufacturing process. Approximately 84% of all wafer fabrication equipment we sold during 2007 was for 300mm wafer manufacturing.
These trends shape the equipment and process demands of our device-manufacturing customers. These customers generally measure the cost and performance of their production equipment in terms of â€ścost per wafer,â€ť a ratio determined by factoring in the costs for acquisition and installation of a system, its operating costs, and net throughput rate. In a fixed period of time, a system with higher net throughput allows a manufacturer to recover the purchase price over a greater number of wafers, thereby reducing the cost of ownership of the system on a per-wafer basis. Yield and film qualities are also significant factors in selecting processing equipment. The increased cost of larger and more complex semiconductor wafers has made high yields extremely important to customers. To achieve higher yields, systems must be able to deposit high quality films repeatably, consistently and reliably. Systems that operate at desired throughput rates with wide process windows can achieve repeatability more easily than those with narrow process windows.
Semiconductor Business Strategy
It is Novellusâ€™ business objective to increase our market share in semiconductor manufacturing process equipment sold to the semiconductor industry. The following are the key elements of our strategy:
Emphasize High-Productivity Systems â€” We established our current position in the industry by emphasizing high productivity as the principal benefit that our products and technologies deliver to customers. Our unique multi-station sequential processing architecture, which is incorporated in many of our products, is an example of our commitment to providing superior productivity and manufacturing repeatability. We intend to retain our historical focus on productivity by applying our multi-station sequential architecture in product enhancements and new product offerings.
Be Recognized for our Technology in our Served Available Markets â€” In the new era of nanoelectronics manufacturing, technology becomes critically important given the difficulties in manufacturing chips at ever smaller line widths. It is our strategy to anticipate the technologies that customers need, and design innovative products which will enhance their manufacturing capabilities.
Focus on Reducing Customer Costs â€” Cost is an important component when measuring overall productivity. We strive to provide products and technologies that reduce the customerâ€™s overall cost of ownership by continuing to increase our systems throughput, improving our deposition quality and improving the reliability of our products.
Broaden our Interconnect Offerings â€” As semiconductor manufacturing technology becomes more complex, the interconnect structures on a device become more critical to overall performance. We have expanded beyond deposition technology with the acquisitions of GaSonics and SpeedFam-IPEC, which give us expertise in dry photoresist removal and chemical-mechanical polish. In addition, in 2005 we introduced our internally developed ultraviolet thermal processing (UVTP) system for post deposition treatment of films to control stress and improve mechanical integrity. Other areas may offer opportunity for future product portfolio expansion.
Differentiate our Service â€” A vital element of success in the systems business is the service, repair and ongoing support of those systems. We operate a global network of customer support services that provide 24-hour access to technical experts, documentation, spare parts, and product upgrades. We provide training and support programs that are custom-tailored to the needs of individual customers that range from turnkey maintenance solutions to economical self-maintenance plans.
Expand Operational and Customer Support Presence in Asia â€” In the fourth quarter of 2006 we announced the establishment of Novellus International Systems, BV in Singapore as our new international headquarters for systems sales. This change more closely aligns our operational structure with our customer base. The semiconductor industry is steadily moving to Asia. We have offices in the key locations necessary to compete, and are actively increasing our worldwide sourcing of materials to this region as well.
Leverage our Low-Cost Manufacturing Structure â€” We perform all system design, assembly and testing in-house, and outsource the manufacture of most subassemblies. This manufacturing strategy allows us to minimize our overhead costs and capital expenditures and gives us flexibility to increase capacity as needed. Outsourcing also allows us to focus on product differentiation through system design and quality control, and helps to ensure that our subsystems incorporate the latest third-party technologies in robotics, gas panel designs and power supplies. We work closely with our suppliers to achieve cost reduction through joint development projects.
Semiconductor Manufacturing Products
Our historical strength is rooted in deposition products. We currently offer products that address the needs of manufacturers across a number of different deposition technologies â€” CVD, PVD and ECD.
Since the introduction of our Concept One Â® dielectric platform in 1987, we have offered a range of processing systems for dielectric and metal deposition. In 1991, we introduced the Concept Two Â® platform â€” a modular, integrated production system capable of depositing both dielectric and conductive metal layers by combining one or more processing chambers with a common, automated wafer handler. The Concept Two enabled semiconductor device manufacturers to increase production throughput and system capability by adding process modules without having to replace existing equipment. In 1997, we introduced the Concept Three Â® platform, which built on the foundation of Concept Two to offer greater throughput in 300mm wafer manufacturing applications.
In the CVD process, manufacturers place wafers in a reaction chamber, introduce a variety of pure and precisely metered gases into the chamber, and then add a form of energy to activate a chemical reaction that deposits a film on the wafers. The CVD process is the traditional method used to deposit dielectric films on wafers. Manufacturers also use CVD to deposit conductive metal layers, particularly tungsten, as it is difficult to deposit such layers on devices with very small features when using conventional PVD or other deposition technologies.
HDP CVD Products
Concept Two SPEED Â® â€” Introduced in 1996, Concept Two SPEED was the semiconductor industryâ€™s first high-density plasma system capable of high-volume manufacturing. Concept Two SPEED is a single-wafer processing system for 200mm substrates, and was originally designed to deposit dielectric materials in an aluminum interconnect manufacturing process. Today, Concept Two SPEED is primarily used to deposit shallow trench isolation (STI) films as part of the transistor formation, as well as to deposit pre-metal dielectrics (PMD) in both aluminum and copper-based devices.
Concept Three SPEED â€” Introduced in 1997, the Concept Three SPEED is designed to deposit dielectric material on 300mm wafers. Concept Three SPEED is based on the production-proven Concept Two product.
SPEED NExT tm â€” Introduced in 2004, the SPEED NExT system for 300mm wafers is designed specifically to address the challenges of dielectric gap fill at 65 nanometers and beyond.
Concept Two ALTUS Â® â€” In 1994, we introduced the Concept Two ALTUS, used to deposit the tungsten plugs and vias that connect aluminum interconnect lines in aluminum-based chips. The Concept Two ALTUS combines the modular architecture of the Concept Two with an advanced tungsten CVD dual-process chamber.
Concept Three ALTUS â€” The Concept Three ALTUS, introduced in 1997, provides the same capabilities for 300mm tungsten deposition as its Concept Two ALTUS predecessor delivers for 200mm wafer applications.
ALTUS DirectFill tm â€” Introduced in 2004, the ALTUS DirectFill tungsten nitride/tungsten deposition system is designed for advanced contact and via-fill applications at 65 nanometers and below. ALTUS DirectFill simplifies the tungsten deposition process by replacing the standard multi-tool approach with a single three-module system.
Concept Two SEQUEL Â® Express tm â€” Introduced in 1999, the Concept Two SEQUEL Express is designed to deposit our CORAL Â® family of low-k dielectric films, as well as other advanced films required for manufacturing 0.18 micron-and-smaller semiconductor devices.
VECTOR Â® â€” Introduced in 2000, VECTOR is a PECVD system for depositing dielectric films on 300mm wafers. In 2007, we introduced three new versions of VECTOR: the VECTOR Express tm , optimized for deposition of thin films of less than 1000 angstroms; the VECTOR Express AHM for ashable hard mask film deposition; and the VECTOR Extreme tm , designed for the demands of high-volume memory â€śmegafabs.â€ť
SOLA Â® â€” Introduced in 2005, SOLA is a UVTP system used for the low-temperature, post-deposition treatment of dielectric films. SOLA is designed for advanced materials such as high stress nitrides and porous low-k dielectrics that are used to deliver increased device speeds and lower power consumption in sub-90 nanometer chips.
PVD, also known as â€śsputtering,â€ť is a process in which ions of an inert gas such as argon are electrically accelerated in a high vacuum toward a target of pure metal, such as tantalum or copper. Upon impact, the argon ions sputter off the target material, which is then deposited as a thin film on the silicon wafer. PVD processes are used to create the barrier and seed layers in copper damascene interconnect applications, as well as conductive aluminum wires in a subtractive aluminum manufacturing process. We entered the PVD marketplace with the acquisition of Varian Associatesâ€™ Thin Film Systems Division in 1997.
INOVA Â® â€” The INOVA 200mm system was originally developed by the Thin Films Systems Division of Varian Associates. Novellus reintroduced the product in 1998 with the addition of a patented Hollow Cathode Magnetron (HCM) Â® ionized PVD source that was designed specifically for the deposition of copper barrier and seed films.
INOVA Â® xT tm â€” In 2000, we introduced the 300mm INOVA xT, which also features HCM technology.
INOVA Â® NExT tm â€” In 2005, we introduced the INOVA NExT, a 300mm metallization system designed to deposit highly conformal copper barrier-seed films at 45 nanometers and beyond. On the INOVA NExT, the single target HCM technology has been extended to the 45 nanometer node.
INOVA NExT HCM IONX tm â€” The latest variant of the INOVA platform, introduced in 2007, incorporates a copper resputtering technology called HCM IONX to improve copper seed conformality, eliminate low-k dielectric damage, and extend PVD technology for seed deposition applications at 32 nm.
Our Electrofill products are used to build the copper primary conductive wires in advanced integrated circuits. Electrofill uses a copper electrolytic solution to create lines and vias in a dielectric layer which has been etched with the pattern of the circuitry, in a process called copper damascene.
SABRE Â® â€” The SABRE copper Electrofill system, featuring a proprietary plating cell, was introduced in 1998. When coupled with the INOVA PVD product, SABRE provides a complete manufacturing module for building advanced copper interconnects.
SABRE xT â€” The second generation SABRE xT, introduced in 1999, is an ECD platform for both 200mm and 300mm wafers. New features on the SABRE xT platform not found on the original SABRE include advanced plating chemistries, an integrated anneal module and closed-loop chemical monitoring.
SABRE NExT tm â€” Introduced in 2003, the SABRE NExT builds on the SABRE xTâ€™s production track record, offering a proprietary chemistry, a new anode cell design and other hardware refinements to tackle the complex process requirements of 90 nanometer, 65 nanometer and 45 nanometer interconnect structures.
SABRE Extreme tm â€” In July 2006, we introduced the SABRE Extreme, an advanced Electrofill system that has been qualified at 45 nanometers and has demonstrated fill at 32 nanometers. The SABRE Extreme incorporates a number of technological innovations for advanced manufacturing applications, including advanced wafer entry control for thin seed layers (< 200A), tunable profile control for improved uniformities, and the capability to plate on materials other than copper.
Surface Preparation Technologies
Chip manufacturers use surface preparation products to remove photoresist from a wafer before proceeding with the next deposition step in the manufacturing process. We entered the market for this manufacturing process step in 2001.
GAMMA Â® 2100 â€” The GAMMA 2100 200mm photoresist removal system uses a plasma source to strip photoresist. The GAMMA architecture features a multi-station sequential processing design with six strip stations.
GAMMA Â® 2130 â€” The GAMMA 2130 system is our photoresist strip system for 300mm wafers. Like the GAMMA 2100, the GAMMA 2130 has a multi-station sequential processing architecture.
GAMMA Â® Express â€” The GAMMA Express, introduced in 2006, is a high productivity resist strip system designed to meet the technology requirements for 45 nanometer manufacturing. GAMMA Express performs high dose implant strip (HDIS) and incorporates non-oxidizing processes for advanced silicides and low-k dielectric films. The redesigned GAMMA Express platform offers a new direct-drive wafer handling subsystem, as well as a new high ash rate source.
CMP systems polish the surface of a wafer after a deposition step in order to create a planar surface before moving on to subsequent manufacturing steps. Since copper films are more difficult to polish than the tungsten and oxide films used in previous-generation aluminum interconnects, and since low-k dielectrics are much more porous than their predecessors, CMP has been elevated to the forefront of the enabling technologies required in a copper damascene manufacturing process. In recognition of this trend, in 2002 Novellus acquired SpeedFam-IPEC, a global supplier of CMP systems used in the fabrication of advanced copper interconnects. We believe that the opportunity to understand the interactions between planarization, deposition and surface preparation steps and to optimize them for overall performance gives us an important advantage in extending copper and low-k processes to advanced semiconductor devices.
MOMENTUM tm â€” MOMENTUM is a high-throughput, dry-in/dry-out CMP system for all 200mm wafer process applications. Designed with extendibility to accommodate future reductions in line widths, the MOMENTUM has four independent wafer-polishing platens. MOMENTUM also employs an orbital polishing motion and features a through-the-pad slurry delivery system.
XCEDA tm â€” Introduced in 2004, the XCEDA copper CMP system is an advanced 300mm platform designed to exceed both the technical and economic requirements of CMP at 65 nanometers and beyond. Like MOMENTUM, XCEDA also has four polishing modules and a through-the-pad slurry delivery system.
Industrial Applications Group Products
We established our Industrial Applications Group in 2004 with the acquisition of Peter Wolters, a German company. We further expanded with the acquisition of Voumard in 2005. Our Industrial Applications Group supplies high-precision machines for grinding, deburring, lapping, honing and polishing the outer surfaces of parts made of metal, glass, ceramic, plastic, silicon or similar materials. Our customers for these machines are manufacturers in sectors such as vehicles, aircraft, and electronic products, parts and components. Other customers are in the glass and ceramics industries as well as manufacturers of products such as pumps, transmissions, compressors and bearings. In all of these areas, the demand for close tolerances for finish quality, thickness, flatness and parallelism is high. Our products include single-side machines, double-side machines, thru-feed grinding machines that feature the continuous feed of parts to be processed, and deburring systems.
Marketing, Sales and Service
We rely on a direct sales force to sell our chip manufacturing products in all geographic regions in the world where semiconductors are manufactured, including Europe, the United States, Korea, Japan, China, Taiwan, Southeast Asia and Israel. Our Industrial Applications products are also sold through a combination of a direct sales force and manufacturerâ€™s representatives.
The ability to provide prompt and effective field service support is critical to our sales efforts, and we believe the support that we provide to our installed base has accelerated the penetration of certain key accounts. We also believe that our marketing efforts are enhanced by the technical expertise of our research and development personnel, who provide customer process applications support and participate in a number of industry forums, conferences and technical symposia.
Intel and Samsung each accounted for 11%, 13% and 17% of our net sales for the years ended December 31, 2007, 2006 and 2005, respectively. Sales to our ten largest customers in 2007, 2006, and 2005 accounted for 59%, 63%, and 66% of our net sales, respectively. We expect that sales of our products to relatively few customers, none of which has entered into long-term agreements requiring them to purchase our products, will continue to account for a high percentage of our net sales in the foreseeable future.
Export sales for the year ended December 31, 2007 were $1.2 billion, or 74% of net sales. For the year ended December 31, 2006, export sales were $1.2 billion, or 72% of net sales. For the year ended December 31, 2005, export sales were $1.0 billion, or 73% of net sales.
As of December 31, 2007, our backlog was $354.5 million, with no cancellations in the period from December 31, 2007 to February 22, 2008. As of December 31, 2006, our backlog was $566.0 million. Our backlog includes transactions for which we have accepted purchase orders and assigned shipment dates within twelve months. All orders are subject to cancellation or rescheduling by customers, with limited or no penalties. Some products are shipped in the same quarter in which the order was received. For this reason, and because of possible changes in delivery schedules, cancellations of orders and delays in shipments, our backlog as of any particular date is not necessarily a reliable indicator of actual shipments for any succeeding period.
Research and Development
The highly cyclical semiconductor manufacturing industry is subject to rapid technological change and continual new product introductions and enhancements. Our ability to remain competitive depends on our success in developing new and enhanced systems, and introducing them at competitive prices on a timely basis. For this reason, we devote a significant portion of our personnel and financial resources to research and development programs.
Our research and development efforts are directed at developing new systems and processes and improving the capabilities of existing systems. Research and development programs include advanced CVD, PVD and ECD systems, advanced gap fill technology, primary conductor metals, low-k dielectric materials, CMP systems and additional advanced deposition and surface preparation technologies for the next generation of smaller-geometry fabrication lines. All new systems under development are capable of processing 300mm wafers.
In the Industrial Application Group (IAG), we focus our research activities on developing new products and improving existing products for the prime wafer industry (wafer grinding, double side polishing, CMP) as well as for the metal and ceramic industry (grinding, lapping, deburring). Continuous improvements of existing systems and processes enable us to further meet our customerâ€™s requirements, as specifications for workpiece tolerances continue to tighten. With new mechatronic concepts we will be able to control the process conditions in our systems more accurately and achieve better results at lower costs. New products and processes are developed to provide solutions for further production steps beside those that are already covered by our systems. Moreover, we are investigating new technologies in high precision machining and surface finish to extend our existing product portfolio and maintain our technical leadership.
Expenditures for research and development during 2007, 2006, and 2005 were $241.0 million, $244.2 million, and $247.3 million, respectively. These expenditures represented approximately 15%, 15%, and 18% of our net sales in 2007, 2006, and 2005, respectively. We believe that research and development expenditures will continue to represent a substantial percentage of our net sales in the future.
Our manufacturing activities consist primarily of assembling and testing components and subassemblies that we acquire from third-party vendors and then integrate into a finished system. We outsource most subassemblies, and we perform all system design, assembly and testing in-house. Our outsourcing strategy enables us to minimize fixed costs and capital expenditures, and provides us with flexibility to increase production capacity. This strategy also allows us to focus on product differentiation through system design and quality control. We believe that our use of outsourced product specialists enables our subsystems to incorporate the latest and most advanced technologies in robotics, gas panel designs and power supplies without the need for in-house expertise. We strive to work as closely as possible with all of our suppliers to achieve mutual cost reduction through joint development efforts.
In the Semiconductor Group, we manufacture our systems in clean-room environments similar to those used by semiconductor manufacturers for semiconductor device fabrication, which helps to minimize the amount of particulates and other contaminants in the final assembled system and to improve product yields for our customers. Following assembly we package our completed systems in vacuum packaging to maintain clean-room standards for particulates and other contaminants during shipment.
Significant competitive factors in the semiconductor equipment market include system performance and flexibility, cost, the size of each manufacturerâ€™s installed customer base, customer support capabilities and the breadth of a companyâ€™s product line. We believe that we compete favorably in all of the market segments we serve because of the fundamental advantages associated with our system performance and flexibility, low cost of ownership, high wafer yields and customer support. However, we face substantial competition from both established competitors and potential new entrants in each of these markets. Installing and integrating capital equipment into a semiconductor production line represents a substantial investment. For this reason, once a manufacturer chooses a particular vendorâ€™s capital equipment, experience has shown that the manufacturer will generally rely upon that equipment for the useful life of the specific application. As a result, all of todayâ€™s semiconductor equipment makers typically have difficulty in selling a product to a particular customer to replace or substitute for a competitorâ€™s product previously chosen or qualified by that customer.
In the CVD, PECVD, HDP and PVD markets, our principal competitor is Applied Materials, Inc. (Applied), a major supplier of systems that has established a substantial base of installed equipment among todayâ€™s semiconductor manufacturers. In the PECVD market, we also compete against ASM International. In the ECD market, our principal competitors are Applied and Semitool, Inc. Our principal competitors in the surface preparation product arena are Mattson Technologies, Inc. and PSK, Inc. In the CMP market, our major competitors are Applied and Ebara Corporation.
The primary competitive factors in the market for machine tools are reliability, price, delivery time, service and technological characteristics. Manufacturers can be categorized by the size of material their products can machine and the precision level they can achieve. IAGâ€™s primary competition comes from several Japanese, German, Taiwanese and Korean manufacturers.
Patents and Proprietary Rights
We intend to continue to pursue patent and trade secret protection for our technology. We currently hold 656 patents. We have many pending patent applications, and we intend to file additional patent applications as appropriate. There can be no assurance that patents will be issued from any of these pending applications or future filings, or that any claims allowed from existing patents or pending or future patent applications will be sufficiently broad to protect our technology. While we intend to vigorously protect our intellectual property rights, there can be no assurance that any patents we hold will not be challenged, invalidated or circumvented, or that the patent rights granted will provide competitive advantages to us. See Part I, Item 3. â€śLegal Proceedings,â€ť for further discussion.
We also rely on trade secrets and proprietary technology that we protect through confidentiality agreements with employees, consultants and other parties. There can be no assurance that these parties will not breach those agreements, that we will have adequate remedies for any breach, or that our trade secrets will not otherwise become known to or independently developed by others.
There has been substantial litigation regarding patent and other intellectual property rights in semiconductor-related industries. We are currently involved in such litigation. Except as set forth in Item 3. Legal Proceedings, we are not aware of any significant claim of infringement by our products of any patent or proprietary rights of others; however, we could become involved in additional litigation in the future. Although we do not believe the outcome of current litigation will have a material impact on our business, financial condition or results of operations, no assurances can be given that current or future litigation will not have such an impact. For further discussion, see Part I, Item 3. Legal Proceedings.
In addition to current litigation, our operations, including the further commercialization of our products, could provoke additional claims of infringement from third parties. In the future, litigation may be necessary to enforce patents issued to us, to protect trade secrets or know-how that we own, to defend ourselves against claimed infringement of the rights of others, or to determine the scope and validity of the proprietary rights of others. Any such litigation could result in substantial cost and diversion of efforts and could have a material adverse effect on our financial condition or operating results. In addition, adverse determinations in such litigation could result in loss of our proprietary rights, subject us to significant liabilities to third parties, require us to seek licenses from third parties, or prevent us from manufacturing or selling our products. Any of these occurrences could have a material adverse effect on our business, financial condition or results of operations.
On December 31, 2007, we had 3,698 full-time and temporary employees. Certain employees outside of the United States in the Industrial Applications Group are represented by labor unions. We have never experienced a work stoppage, slowdown or strike. We consider our employee relations to be good.
The success of our future operations depends in large part on our ability to recruit and retain senior management, engineers, sales and service professionals and other key personnel. Qualified people are in great demand across each of these industry disciplines, and there can be no assurance that we will be successful in retaining or recruiting key personnel.
Mr. Hill has been Chief Executive Officer and a member of the Board of Directors of the Company since December 1993. In May 1996, he was appointed Chairman of the Board of Directors. From 1981 to 1993, Mr. Hill was employed by Tektronix, Inc., a provider of communications network management and diagnostic solutions, where he held various positions, including President of the Tektronix Development Company, Vice President of the Test & Measurement Group, and President of Tektronix Components Corporation. Prior to joining Tektronix, Inc., Mr. Hill held engineering or management positions at General Electric Corporation, a multinational technology services conglomerate; Motorola Inc., a communications company; and Hughes Aircraft Company, an aerospace and defense company. Mr. Hill holds a Bachelor of Science degree in Engineering from the University of Illinois and a Master of Business Administration from Syracuse University. Mr. Hill is also a member of the Board of Directors of LSI Logic Corp., Arrow Electronics, Inc. and the University of Illinois Foundation.
Mr. Bonke became a member of the Board of Directors in April 2004. Mr. Bonke has been a private investor for the past six years and is the retired Chairman of the Board of Directors and Chief Executive Officer of Electroglas, Inc., a semiconductor test equipment manufacturer. He also serves on the Board of Directors of Sanmina-SCI Corporation, an electronics manufacturing services company. Mr. Bonke is a past director of the San Jose State University Foundation. Mr. Bonke holds a Bachelor of Science degree in Engineering and Technical Marketing from Clarkson University.
Mr. El-Mansy became a member of the Board of Directors in April 2004. Mr. El-Mansy is the retired Vice President, Director of Logic Technology Development, at Intel Corporation (â€śIntelâ€ť), a leading producer of microchips, computing and communications products, where he was responsible for managing technology development, the processor design center for Intelâ€™s Technology and Manufacturing Group and two wafer manufacturing facilities. Mr. El-Mansy joined Intel in 1979 and led microprocessor technology development at Intel for 20 years. Prior to joining Intel, Mr. El-Mansy held engineering positions at Bell Northern Research, a telecommunications company in Canada. Mr. El-Mansy is also a member of the Board of Directors of Zygo Corporation, a designer and manufacturer of optical systems. Mr. El-Mansy holds Bachelor of Science and Masters degrees in Electronics and Communications from Alexandria University in Egypt and a Ph.D. in Electronics from Carleton University in Ottawa, Canada.
Mr. Litster joined the Board of Directors in February 1998. Mr. Litster is a Professor of Physics at the Massachusetts Institute of Technology (â€śMITâ€ť). From 1991 to 2001, he was Vice President and Dean for Research at MIT. From 1983 through 1988, he was the director of MITâ€™s Center for Materials Science and Engineering and from 1988 through 1992; he was the director of the Francis Bitter National Magnet Laboratory at MIT. Mr. Litster is a fellow of the American Physical Society, the American Academy of Arts and Sciences and the American Association for the Advancement of Science. In 1993, Mr. Litster was awarded the Irving Langmuir Prize by the American Physical Society. Mr. Litster holds a Bachelor of Engineering degree from McMaster University in Hamilton, Ontario, Canada, and a Ph.D. in Physics from MIT.
Mr. Nishi joined the Board of Directors in May 2002. Mr. Nishi is a Professor of Electrical Engineering and Director of the Stanford University Nanofabrication Facility. Mr. Nishi joined Stanford University in May 2002 after serving as Director of Research and Development and Senior Vice President at Texas Instruments, Inc., a semiconductor company, from 1995 to 2002. Mr. Nishi joined Texas Instruments, Inc. in 1995 as Vice President and Director of Research and Development for the Semiconductor Group. From 1986 to 1995, Mr. Nishi held various senior management positions in research and development at Hewlett Packard Company (â€śHewlett Packardâ€ť), a leading provider of products, technologies, software, solutions and services. From 1969 to 1985, Mr. Nishi held various managerial positions at Toshiba Corporation, an electronics corporation. From 1986 to 2002, Mr. Nishi was a Consulting Professor in the Department of Electrical Engineering and served on the Advisory Committee for the Center for Integrated Systems at Stanford University. From 1993 to 1996, Mr. Nishi taught at Waseda University in Japan as a visiting professor of the Material Sciences and Engineering Department and the Electronic Communication Engineering Department for intensive courses. Mr. Nishi served on a wide range of boards, committees and advisory boards including The Development Board and Executive Committee for the University of Texas, the Board of Directors of the Japan-America Society of Dallas/Fort Worth, the Advisory Committee, Information Sciences & Technology, Lawrence Livermore National Laboratory and the Board of Directors of SEMATECH. In 2006, Mr. Nishi was also a member of the Supervisory Board of Qimonda A.G., the second largest supplier of DRAM memory products. Mr. Nishi holds a Bachelor of Science degree in Metallurgy from Waseda University and a Ph.D. in Electronics Engineering from the University of Tokyo.
Mr. Possley joined the Board of Directors in July 1991. He is currently a managing general partner of Glen-Ore Associates, a consulting enterprise focused on the semiconductor industry. Since 2003 he has served as an Executive Adviser and Investor for the Silicon Border Project. From October 1997 through December 1999, Mr. Possley was an associate consultant at N-Able Group, a semiconductor consulting company. From March 1994 to September 1997, Mr. Possley was President of SubMicron Technology, PCL, a semiconductor wafer manufacturing company. From April 1992 to May 1994, he was Senior Vice President of Manufacturing at Ramtron International, a semiconductor company. From January 1991 to March 1992, he was Vice President, Operations at Sandisk, Inc., a manufacturer of solid state memory systems. From January 1986 to December 1990, Mr. Possley was Senior Vice President of Manufacturing for Philips Semiconductor, Inc., a semiconductor company. Prior to joining Philips Semiconductor, Inc., he was Vice President, Wafer Fabrication and Research and Development at United Technologies Mostek, a multinational conglomerate, and held management and engineering positions with the Semiconductor Products Sector of Motorola Inc., a provide of broadband and wireless communications; Texas Instruments, Inc., a semiconductor company; Fairchild Camera and Instrument Corporation, an electronic research and development company, and the semiconductor division of General Electric Corporation, a multinational technology services conglomerate. Mr. Possley is also a director of Catalyst Semiconductor, Inc., and ASAT Holdings Limited, a global provider of semiconductor assembly, test and design. Mr. Possley holds a Bachelor of Science degree in Mathematics from Western Illinois University and a Ph.D. in Physical Chemistry from the University of Kentucky.
Ms. Rhoads joined the Board of Directors in February 2003. She is Chief Financial Officer of Premier, Inc., a healthcare supply management company. From 1998 to 2000, she was Vice President, Strategic Initiatives at Premier, Inc. From 1993 to 1998, Ms. Rhoads was a Vice President of The Sprout Group, an institutional venture capital firm. Ms. Rhoads is also a member of the Board of Directors of Innovatix, LLC, a privately held company. Ms. Rhoads holds a Bachelor of Science degree in Finance from the University of Arkansas and a Masters degree from the Harvard Graduate School of Business Administration.
Mr. Spivey joined the Board of Directors in May 1998. From 2000 to 2001, he was President, Chief Executive Officer and a Director of Luminent, Inc., a producer of fiber optic components. From 1997 to 2000, he was Group President, Network Products Group of Lucent Technologies a producer of world-wide communications products. From 1994 to 1997, he was Vice President of the Systems and Components Group of AT&T, a communications company. From 1991 to 1994, he was the President of Tektronix Development Company and Group President at Tektronix, Inc., a provider of communications network management and diagnostic solutions. Previously, Mr. Spivey held managerial positions at Honeywell, Inc. and General Electric Corporation, technology services companies with broad business divisions. Mr. Spivey also serves on the Board of Directors of Cascade Microtech, Inc., the Laird Group, Plc., Raytheon Company, and ADC Telecommunications. Mr. Spivey holds a Bachelor of Science degree in Physics from Duquense University, a Masters degree in Physics from Indiana University of Pennsylvania and a Ph.D. in Management from Walden University.
Mr. Whitaker joined the Board of Directors in March 2002. From 1968 to 2000, Mr. Whitaker was employed by Texas Instruments, Inc., a semiconductor company, where he held positions including Senior Vice President of Worldwide Analog and Standard Logic, Vice President of US Semiconductor Business, and various management positions in product departments, marketing and sales. Prior to joining Texas Instruments, Inc., Mr. Whitaker held an engineering position at General Electric Corporation, a multinational technology services conglomerate. Mr. Whitaker holds a Bachelor of Science degree in Electrical Engineering from Texas A&M University where he is a member of the Engineering Advisory Board.
MANAGEMENT DISCUSSION FROM LATEST 10K
The following Managementâ€™s Discussion and Analysis of Financial Condition and Results of Operations (MD&A) is intended to provide readers with an understanding of Novellus. Our MD&A addresses the following topics:
â€˘ Overview of Our Business and Industry;
â€˘ Financial Performance Overview;
â€˘ Results of Operations;
â€˘ Critical Accounting Policies;
â€˘ Liquidity and Capital Resources;
â€˘ Off-Balance Sheet Arrangements;
â€˘ Contractual Obligations;
â€˘ Purchase Commitments; and
â€˘ Recent Accounting Pronouncements.
Overview of Our Business and Industry
Novellus Systems, Inc. is a California corporation organized in 1984. At Novellus, we primarily develop, manufacture, sell and support equipment used in the fabrication of integrated circuits, commonly called chips or semiconductors. Customers for these products manufacture chips for sale or for incorporation in their own products, or provide chip-manufacturing services to third parties. The segment of our business serving this area is the Semiconductor Group.
In 2004, we diversified by acquiring Peter Wolters AG, a German company specializing in lapping and polishing equipment for a number of industries. With the acquisition of Peter Wolters AG, Novellus entered into market sectors beyond semiconductor manufacturing. We call this segment the Industrial Applications Group (IAG). In November 2005 we acquired Voumard, a privately-held manufacturer of high-precision machine manufacturing tools based in Neuchatel, Switzerland, to expand our product offerings within IAG.
In the Semiconductor Group, our business depends on capital expenditures made by integrated circuit manufacturers, who in turn are dependent on corporate and consumer demand for integrated circuits and the electronic products which use them. Since the industry in which we operate is driven by spending for electronic products, our business is directly affected by growth or contraction in the global economy as well as by the adoption of new technologies. Demand for personal computers, the expansion of the Internet and telecommunications industries, and the emergence of new applications in consumer electronics have a direct impact on our business. In addition, the industry is characterized by intense competition and rapidly changing technology. We continue to work closely with our customers and make substantial investments in research and development in order to continue delivering innovative products which enhance productivity for our customers and utilize the latest technology. We believe these investments have positioned us for future growth.
In the Industrial Applications Group, our business depends on capital expenditures made by manufacturers in sectors such as vehicles, aircraft and electronic products, parts and components. At the broadest level, machine tools demand is highly sensitive to macroeconomic conditions as our customer base includes some of the most cyclically sensitive industries in the economy. As a result, such variables as the outlook for overall economic growth, fixed investment and durable goods shipments directly affect the growth of our business. Our industrial business also depends on niche applications in addition to the general machine tool cycle. As we continue to expand our capabilities in this segment, our operations are increasingly impacted by the wafer industry which, similar to the semiconductor segment, is also characterized by intense competition and rapidly changing technology.
We focus on certain key quarterly financial data to manage our business. Net sales, gross profit, net income and net income per share are the primary measures we use to monitor performance. We also use certain non-GAAP measures, such as shipments and net orders, to assess business trends and performance. Shipments consists of products shipped to customers, without regard to net sales adjustments such as deferrals associated with customer acceptance. Shipments and net orders, which are also referred to as bookings, are used to forecast and plan future operations. Net orders consist of current period orders less current period cancellations. We do not report orders for systems with delivery dates more than 12 months after receipt of the order.
Due to the cyclical nature of our business, we expect that net orders will continue to fluctuate. The receipt of net orders in a particular quarter affects revenue in subsequent quarters. Net orders result in revenue either at shipment and transfer of title or upon customer acceptance of the equipment. Our revenue recognition policy addresses the distinction between the revenue recognized upon shipment and transfer of title and the revenue recognized upon customer acceptance. Equipment generally ships within two to six months of receiving the related order and if applicable, customer acceptance is typically received one to six months after shipment. These time lines are general estimates and actual times may vary depending on specific customer circumstances.
The decrease in net orders from fiscal 2006 is the result of weakening in the DRAM and foundry semiconductor sectors. We believe there is strong underlying demand in the industry over the long term. However, capacity continued to outpace demand through 2007. We took preemptive action in the Semiconductor Group to reduce expenses in the second half of 2007, including business shutdowns, which reduced operating expenses by approximately $5.2 million in 2007. In 2008, our goal is to continue to implement cost reduction and expense control measures that will further reduce our ongoing operating costs and expenses.
Demand for our systems can vary significantly from period to period as a result of several factors, including, but not limited to, downturns in the economy and semiconductor industry, supply of and demand for semiconductor devices, and competition in the semiconductor industry among suppliers of similar products. For these and other reasons, our results of operations for fiscal years 2007, 2006 and 2005 may not necessarily be indicative of future operating results.
Financial Performance Overview
The following is an overview of our financial performance for the year ended December 31, 2007 compared to the year ended December 31, 2006:
â€˘ Net sales decreased 5.3% to $1.6 billion from $1.7 billion;
â€˘ Net income increased 12.5% to $213.7 million from $190.0 million;
â€˘ Diluted net income per share increased to $1.75 from $1.50;
â€˘ Net orders decreased 22.0% to $1.4 billion from $1.8 billion; and
â€˘ Shipment revenue remained relatively consistent at $1.6 billion.
Results of Operations
The net sales we report is correlated to shipments in the current period, previously reported shipments and timing of customer acceptance. Semiconductor Group net sales decreased $151.8 million from 2006 to 2007 primarily as a result of weakening DRAM and foundry semiconductor industry demand. Industrial Applications Group net sales increased $63.4 million in 2007 from 2006 due primarily to strong demand for polishing systems by silicon wafer manufacturers. Favorable changes in exchange rates contributed to increased net sales by 9% in the Industrial Applications Group from 2006 to 2007.
Net sales related to our Semiconductor Group increased $311.0 million from 2005 to 2006, while sales related to our Industrial Applications Group increased by $7.0 million from 2005 to 2006. The increase in net sales of our Semiconductor Group is primarily due to increased sales volume and a change in the mix of products sold.
A significant portion of our net sales is generated in Asia, primarily because a substantial portion of the worldâ€™s semiconductor manufacturing capacity is located there. We consider the Asia region to include Korea, Japan, Singapore, Malaysia, China and Taiwan. During 2006, we established an international headquarters in Singapore for international sales, which more closely aligns our operational structure with our customer base. We plan to continue to focus on expanding our market presence in Asia, as we believe that significant additional growth potential exists in this region over the long term.
The decrease in gross profit as a percentage of net sales in 2007 compared to 2006 is due primarily to changes in product mix and a higher percentage of net sales from the Industrial Applications Group where margins are generally lower than the Semiconductor Group.
The increase in gross profit as a percentage of net sales in 2006 compared to 2005 is due primarily to a reduction in installation and warranty costs, a change in the mix of products sold, and efficiencies in operations. Gross margin also increased by $2.5 million from 2005 to 2006 due to the adoption of SFAS 151 and decreased by $0.7 million due to the adoption of SFAS 123R.
Our gross profit from period to period is affected by the treatment of certain product sales in accordance with our revenue recognition policy. See Note 2 of our Consolidated Financial Statements for further disclosure of our accounting policy.
Selling, General and Administrative (SG&A)
SG&A expense includes compensation and benefits for corporate, financial, marketing, sales and administrative personnel as well as travel expenses and professional service fees. Also included are expenses for rents, utilities, and depreciation and amortization related to the assets utilized by these functions.
SG&A expense increased $4.6 million in 2007 from 2006. This primarily relates to an overall increase in employee compensation costs. Merit pay increases during the year were partially offset by reductions in share-based compensation expense and cost savings from additional business shutdowns. Share-based compensation decreased by $4.8 million, primarily due to the reversal of 2006 expense for performance-based restricted stock awards where vesting is no longer probable and the increase in our estimated option forfeiture rate in 2007 from 2006. SG&A expense increased as a percentage of net sales as a result of the 5% decline in net sales from the prior year.
The increase in SG&A expense in 2006 over the prior year, in absolute dollars and as a percentage of sales, is primarily due to an increase in stock compensation expense of $20.2 million related to the adoption of SFAS 123R, the acquisition of Voumard, an increase in headcount to support sales volume and increases in commissions and profit sharing due to increased sales and improved financial performance in 2006.
R&D expense includes compensation and benefits for research and development personnel, project materials, chemicals and other direct expenses incurred in product and technology development. Also included are expenses for equipment repairs and maintenance, rents, utilities and depreciation. Our significant investments in R&D over the past several years reflect our strong commitment to the continuous improvement of our current product lines and the development of new products and technologies. We continue to believe that significant investment in R&D is required to remain competitive, and we plan to continue to invest in new products and enhancement of our current product lines.
R&D expense decreased in absolute dollars in 2007 from 2006 generally due to lower stock-based compensation expense of $2.5 million, combined with reduced depreciation and related facility costs resulting from previous restructuring actions. As a result, R&D expense as a percentage of net sales remained consistent with the prior year.
The slight decrease in R&D expense in 2006 from 2005 results from lower R&D program spending and lower depreciation and related facility costs due to restructuring. This decrease is partially offset by an increase of $9.9 million of stock-based compensation included in R&D primarily as a result of the adoption of SFAS 123R. As a percentage of sales R&D has decreased due to higher sales and relatively fixed R&D spending.
In the fourth quarter of 2007, we completed the sale of certain facilities in San Jose, California, resulting in a gain of $9.1 million that is included in operating income as part of Restructuring and other charges (benefits). This sale substantially completes the actions contemplated under the restructuring plan implemented during the first quarter of 2006. Offsetting the gain on sale of assets was $1.1 million in additional expenses resulting from changes in estimates associated primarily with facility exit costs.
During the first quarter of 2006, we implemented a restructuring plan to dispose of certain owned facilities located in San Jose, California. We considered the change in planned use of the facilities as an indicator of impairment and determined that two of the facilities were impaired, resulting in impairment charges of $8.9 million to write these facilities down to their estimated fair value.
In 2006, we also recorded restructuring charges of $6.0 million related to future lease payments, $1.3 million related to accelerated depreciation of leasehold improvements and $0.2 million related to other charges, all in connection with a restructuring plan we implemented in 2005 to relocate certain operations from Chandler, Arizona to San Jose, California and Tualatin, Oregon. These charges were offset by the reversal of a previously recorded restructuring accrual of $5.5 million due to a change in future estimated sublease income.
During 2005, we incurred a severance charge of $0.8 million and asset impairments of $14.2 million. These charges were offset by the reversal of a previously recorded restructuring accrual of $5.8 million due to a change in future estimated sublease income.
The charges for vacated facilities relate primarily to rent obligations after the abandonment of certain facilities currently under long-term operating lease agreements. When applicable, anticipated future sublease income related to the vacated buildings has been offset against the charge for the remaining lease payments. Additionally, certain property and equipment, including leasehold improvements, associated with the abandoned facilities that had no future economic benefit have been written off. As a result of the 2006 restructuring plan we experienced cash flow savings of $2.0 million and $1.3 million in 2007 and 2006, respectively, due primarily to sublease income. We anticipate savings of approximately $2.3 million in 2008 associated with this restructuring plan.
MANAGEMENT DISCUSSION FOR LATEST QUARTER
Results of Operations
The net sales we report is correlated to shipments in the current period, previously reported shipments and timing of customer acceptance. Deferred revenue at the end of the third quarter 2007 was $108.9 million. Net sales recorded in the Semiconductor Group decreased compared to prior periods as a result of weakening semiconductor industry demand.
Industrial Applications Group (IAG) net sales are up sequentially and year over year due to improved performance in the business and favorable exchange rate fluctuations. The functional currency of IAG is primarily the Euro. Changes in the exchange rate increased net sales by 6% from the third quarter 2006 to the third quarter 2007 and 7% for the nine months ended September 29, 2007 over the same period in the prior year.
A significant portion of our net sales is generated in Asia, primarily because a substantial portion of the worldâ€™s semiconductor manufacturing capacity is located there. We consider the Asia region to include Korea, Japan, Singapore, Malaysia, China and Taiwan. In the fourth quarter 2006, we established, in Singapore, our new international headquarters for sales, which more closely aligns our operational structure with our customer base. We plan to continue to focus on expanding our market presence in Asia, as we believe that significant additional growth potential exists in this region over the long term.
The decrease in gross profit in the third quarter 2007 compared to the second quarter 2007 and third quarter 2006 is primarily due to lower revenues. Gross margin decreased from the second quarter 2007 and from the third quarter 2006 primarily as a result of increased sales as a percentage of total sales in IAG, where margins are generally lower than in the Semiconductor Group. In order to conform classification practices of IAG with those of the Semiconductor Group, in the third quarter 2007 we reclassified certain costs from SG&A expense to cost of sales ($1.9 million of which relate to the first six months of 2007).
SG&A expense includes compensation and benefits for corporate, financial, marketing, sales and administrative personnel as well as travel expenses and professional service fees. Also included are expenses for rents, utilities, and depreciation and amortization related to the assets utilized by these functions.
SG&A expense decreased in absolute dollars in the third quarter 2007 from the second quarter 2007 as a result of savings from decreases in executive salaries and our planned shutdowns. SG&A expense was also affected by the reclassification discussed above and the reclassification in the third quarter 2007 of certain costs from SG&A expense to R&D expense ($0.7 million of which relate to the first six months of 2007). SG&A expense increased as a percentage of net sales in the third quarter 2007 from the third quarter 2006 primarily due to the decrease in net sales. SG&A expense has increased in absolute dollars in the nine months ended September 29, 2007, compared to the same period in the prior year, primarily due to increases in employee compensation costs, including merit pay increases and profit sharing.
Research and Development (R&D)
R&D expense includes compensation and benefits for our research and development personnel, project materials, chemicals and other direct expenses incurred in product and technology development. Also included are expenses for equipment repairs and maintenance, rents, utilities and depreciation. Our significant investments in R&D over the past several years reflect our strong commitment to the continuous improvement of our current product lines and the development of new products and technologies. We continue to believe that significant investment in R&D is required to remain competitive, and we plan to continue to invest in new products and enhancement of our current product lines.
R&D expense increased as a percentage of sales in the third quarter 2007 compared to the second quarter 2007 and the third quarter of 2006 substantially due to a decrease in net sales. R&D expense was also affected by the reclassification discussed above.
Interest and Other Income, Net
Interest and other income, net includes interest income, interest expense and other non-operating items. Interest and other income, net decreased from the second quarter 2007 as a result of decreased gains on foreign currency transactions and the write-down of a short-term investment in the amount of $1.8 million. The increase for the nine months ended September 29, 2007 over the same period in the prior year is principally due to an increase in interest income on higher balances of cash and short-term investments and higher yields on those interest-bearing investments.
Our effective tax rate was 33.2%, 34.3% and 35.0% for the three months ended September 29, 2007, June 30, 2007 and September 30, 2006, respectively. Our effective tax rate was 33.1% and 35.2% for the nine months ended September 29, 2007 and September 30, 2006, respectively. The lower effective tax rate for the three and nine months ended September 29, 2007 as compared to the same periods in 2006 results primarily from increased tax-exempt interest income and from the federal research and development credit. Our future effective income tax rate depends on various factors, such as our profits (losses) before taxes, tax legislation, the geographic composition of pre-tax income, and non-deductible expenses incurred in connection with acquisitions.
Critical Accounting Policies
The preparation of financial statements in conformity with U.S. GAAP requires that we make estimates and judgments that affect the reported amounts of assets, liabilities, revenues and expenses and the related disclosure of contingent assets and liabilities. On an ongoing basis, we evaluate our assumptions and estimates, including those related to recognition of revenue, valuation of inventory, valuation of goodwill and other intangible assets, valuation of deferred tax assets, adequacy of warranty obligations, measurement of restructuring and impairment charges, compliance with hedge accounting for derivatives, measurement of stock-based compensation expense and litigation. We base our estimates on historical experience and on various assumptions that are believed to be reasonable under the circumstances, the results of which form the basis for making judgments about the carrying values of assets and liabilities that are not readily apparent from other sources. Actual results may differ from these estimates under different assumptions or conditions. We discuss our critical accounting policies in Managementâ€™s Discussion and Analysis of Financial Condition and Results of Operations in our Annual Report on Form 10-K for the year ended December 31, 2006. There have been no significant changes in our critical accounting policies or estimates since the end of fiscal 2006.